6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-01 10:57:21 +00:00
Code Issues Projects Releases Wiki Activity

Delete dead code.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196551 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reed Kotler 2013-12-06 00:13:50 +00:00
parent ab906d0048
commit dee63f414d
2 changed files with 0 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
lib/Target/Mips/Mips16InstrInfo.cpp
View File

@ -426,22 +426,6 @@ Mips16InstrInfo::loadImmediate(unsigned FrameReg,
return Reg;
}
/// This function generates the sequence of instructions needed to get the
/// result of adding register REG and immediate IMM.
unsigned
Mips16InstrInfo::basicLoadImmediate(
unsigned FrameReg,
int64_t Imm, MachineBasicBlock &MBB,
MachineBasicBlock::iterator II, DebugLoc DL,
unsigned &NewImm) const {
const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;
MachineRegisterInfo &RegInfo = MBB.getParent()->getRegInfo();
unsigned Reg = RegInfo.createVirtualRegister(RC);
BuildMI(MBB, II, DL, get(Mips::LwConstant32), Reg).addImm(Imm);
NewImm = 0;
return Reg;
}
unsigned Mips16InstrInfo::getAnalyzableBrOpc(unsigned Opc) const {
return (Opc == Mips::BeqzRxImmX16 || Opc == Mips::BimmX16 ||
Opc == Mips::Bimm16 ||

5
lib/Target/Mips/Mips16InstrInfo.h
View File

@ -88,11 +88,6 @@ public:
MachineBasicBlock::iterator II, DebugLoc DL,
unsigned &NewImm) const;
unsigned basicLoadImmediate(unsigned FrameReg,
int64_t Imm, MachineBasicBlock &MBB,
MachineBasicBlock::iterator II, DebugLoc DL,
unsigned &NewImm) const;
static bool validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount);
static bool validSpImm8(int offset) {