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R600: Do not fold modifier/litterals in vector inst
This fixes a couple of regressions on (probably not just) cayman NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175180 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -218,7 +218,9 @@ SDNode *AMDGPUDAGToDAGISel::Select(SDNode *N) {
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continue;
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}
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} else {
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if (!TII->isALUInstr(Use->getMachineOpcode())) {
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if (!TII->isALUInstr(Use->getMachineOpcode()) ||
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(TII->get(Use->getMachineOpcode()).TSFlags &
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R600_InstFlag::VECTOR)) {
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continue;
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}
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@ -261,7 +263,8 @@ SDNode *AMDGPUDAGToDAGISel::Select(SDNode *N) {
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if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
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const R600InstrInfo *TII =
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static_cast<const R600InstrInfo*>(TM.getInstrInfo());
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if (Result && Result->isMachineOpcode()
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if (Result && Result->isMachineOpcode() &&
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!(TII->get(Result->getMachineOpcode()).TSFlags & R600_InstFlag::VECTOR)
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&& TII->isALUInstr(Result->getMachineOpcode())) {
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// Fold FNEG/FABS/CONST_ADDRESS
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// TODO: Isel can generate multiple MachineInst, we need to recursively
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