mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
ok, this is something of a dirty hack, but it seems to work. (fixes e.g.
the SPASS miscompilation) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37750 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
b2efabd571
commit
df82c93f2a
@ -459,9 +459,23 @@ unsigned RABigBlock::chooseReg(MachineBasicBlock &MBB, MachineInstr *I,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(PhysReg == 0) { // ok, now we're desperate. We couldn't choose
|
||||
// a register to spill by looking through the
|
||||
// read timetable, so now we just spill the
|
||||
// first allocatable register we find.
|
||||
|
||||
// for all physical regs in the RC,
|
||||
for(TargetRegisterClass::iterator pReg = RC->begin();
|
||||
pReg != RC->end(); ++pReg) {
|
||||
// if we find a register we can spill
|
||||
if(PhysRegsUsed[*pReg]>=-1)
|
||||
PhysReg = *pReg; // choose it to be spilled
|
||||
}
|
||||
}
|
||||
|
||||
assert(PhysReg && "couldn't grab a register from the table?");
|
||||
// TODO: assert that RC->contains(PhysReg) / handle aliased registers
|
||||
assert(PhysReg && "couldn't choose a register to spill :( ");
|
||||
// TODO: assert that RC->contains(PhysReg) / handle aliased registers?
|
||||
|
||||
// since we needed to look in the table we need to spill this register.
|
||||
spillPhysReg(MBB, I, PhysReg);
|
||||
|
Loading…
Reference in New Issue
Block a user