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swap vselect operand order - pr10907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139630 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5958,31 +5958,31 @@ defm VBLENDVPSY : SS41I_quaternary_int_avx<0x4A, "vblendvps", VR256, i256mem,
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let Predicates = [HasAVX] in {
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def : Pat<(v16i8 (vselect (v16i8 VR128:$mask), (v16i8 VR128:$src1),
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(v16i8 VR128:$src2))),
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(VPBLENDVBrr VR128:$src1, VR128:$src2, VR128:$mask)>;
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(VPBLENDVBrr VR128:$src2, VR128:$src1, VR128:$mask)>;
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def : Pat<(v4i32 (vselect (v4i32 VR128:$mask), (v4i32 VR128:$src1),
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(v4i32 VR128:$src2))),
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(VBLENDVPSrr VR128:$src1, VR128:$src2, VR128:$mask)>;
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(VBLENDVPSrr VR128:$src2, VR128:$src1, VR128:$mask)>;
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def : Pat<(v4f32 (vselect (v4i32 VR128:$mask), (v4f32 VR128:$src1),
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(v4f32 VR128:$src2))),
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(VBLENDVPSrr VR128:$src1, VR128:$src2, VR128:$mask)>;
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(VBLENDVPSrr VR128:$src2, VR128:$src1, VR128:$mask)>;
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def : Pat<(v2i64 (vselect (v2i64 VR128:$mask), (v2i64 VR128:$src1),
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(v2i64 VR128:$src2))),
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(VBLENDVPDrr VR128:$src1, VR128:$src2, VR128:$mask)>;
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(VBLENDVPDrr VR128:$src2, VR128:$src1, VR128:$mask)>;
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def : Pat<(v2f64 (vselect (v2i64 VR128:$mask), (v2f64 VR128:$src1),
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(v2f64 VR128:$src2))),
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(VBLENDVPDrr VR128:$src1, VR128:$src2, VR128:$mask)>;
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(VBLENDVPDrr VR128:$src2, VR128:$src1, VR128:$mask)>;
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def : Pat<(v8i32 (vselect (v8i32 VR256:$mask), (v8i32 VR256:$src1),
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(v8i32 VR256:$src2))),
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(VBLENDVPSYrr VR256:$src1, VR256:$src2, VR256:$mask)>;
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(VBLENDVPSYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
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def : Pat<(v8f32 (vselect (v8i32 VR256:$mask), (v8f32 VR256:$src1),
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(v8f32 VR256:$src2))),
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(VBLENDVPSYrr VR256:$src1, VR256:$src2, VR256:$mask)>;
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(VBLENDVPSYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
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def : Pat<(v4i64 (vselect (v4i64 VR256:$mask), (v4i64 VR256:$src1),
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(v4i64 VR256:$src2))),
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(VBLENDVPDYrr VR256:$src1, VR256:$src2, VR256:$mask)>;
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(VBLENDVPDYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
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def : Pat<(v4f64 (vselect (v4i64 VR256:$mask), (v4f64 VR256:$src1),
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(v4f64 VR256:$src2))),
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(VBLENDVPDYrr VR256:$src1, VR256:$src2, VR256:$mask)>;
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(VBLENDVPDYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
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}
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/// SS41I_ternary_int - SSE 4.1 ternary operator
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@ -6012,19 +6012,19 @@ defm PBLENDVB : SS41I_ternary_int<0x10, "pblendvb", int_x86_sse41_pblendvb>;
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let Predicates = [HasSSE41] in {
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def : Pat<(v16i8 (vselect (v16i8 XMM0), (v16i8 VR128:$src1),
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(v16i8 VR128:$src2))),
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(PBLENDVBrr0 VR128:$src1, VR128:$src2)>;
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(PBLENDVBrr0 VR128:$src2, VR128:$src1)>;
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def : Pat<(v4i32 (vselect (v4i32 XMM0), (v4i32 VR128:$src1),
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(v4i32 VR128:$src2))),
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(BLENDVPSrr0 VR128:$src1, VR128:$src2)>;
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(BLENDVPSrr0 VR128:$src2, VR128:$src1)>;
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def : Pat<(v4f32 (vselect (v4i32 XMM0), (v4f32 VR128:$src1),
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(v4f32 VR128:$src2))),
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(BLENDVPSrr0 VR128:$src1, VR128:$src2)>;
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(BLENDVPSrr0 VR128:$src2, VR128:$src1)>;
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def : Pat<(v2i64 (vselect (v2i64 XMM0), (v2i64 VR128:$src1),
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(v2i64 VR128:$src2))),
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(BLENDVPDrr0 VR128:$src1, VR128:$src2)>;
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(BLENDVPDrr0 VR128:$src2, VR128:$src1)>;
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def : Pat<(v2f64 (vselect (v2i64 XMM0), (v2f64 VR128:$src1),
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(v2f64 VR128:$src2))),
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(BLENDVPDrr0 VR128:$src1, VR128:$src2)>;
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(BLENDVPDrr0 VR128:$src2, VR128:$src1)>;
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}
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let Predicates = [HasAVX] in
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