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InstCombine: If we have a bit test and a sign test anded/ored together, merge the sign bit into the bit test.
This is common in bit field code, e.g. checking if the first or the last bit of a bit field is set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147749 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -743,6 +743,22 @@ Value *InstCombiner::FoldAndOfICmps(ICmpInst *LHS, ICmpInst *RHS) {
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}
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}
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}
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// (X & C) == 0 & X > -1 -> (X & (C | SignBit)) == 0
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if (LHS->hasOneUse() && RHS->hasOneUse() &&
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((LHSCC == ICmpInst::ICMP_EQ && LHSCst->isZero() &&
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RHSCC == ICmpInst::ICMP_SGT && RHSCst->isAllOnesValue()) ||
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(RHSCC == ICmpInst::ICMP_EQ && RHSCst->isZero() &&
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LHSCC == ICmpInst::ICMP_SGT && LHSCst->isAllOnesValue()))) {
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BinaryOperator *BO =
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dyn_cast<BinaryOperator>(LHSCC == ICmpInst::ICMP_EQ ? Val : Val2);
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ConstantInt *AndCst;
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if (BO && match(BO, m_OneUse(m_And(m_Value(), m_ConstantInt(AndCst))))) {
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APInt New = AndCst->getValue() | APInt::getSignBit(AndCst->getBitWidth());
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BO->setOperand(1, ConstantInt::get(AndCst->getContext(), New));
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return BO == Val ? LHS : RHS;
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}
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}
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// From here on, we only handle:
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// (icmp1 A, C1) & (icmp2 A, C2) --> something simpler.
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@ -1442,6 +1458,22 @@ Value *InstCombiner::FoldOrOfICmps(ICmpInst *LHS, ICmpInst *RHS) {
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}
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}
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// (X & C) != 0 & X < 0 -> (X & (C | SignBit)) != 0
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if (LHS->hasOneUse() && RHS->hasOneUse() &&
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((LHSCC == ICmpInst::ICMP_NE && LHSCst->isZero() &&
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RHSCC == ICmpInst::ICMP_SLT && RHSCst->isZero()) ||
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(RHSCC == ICmpInst::ICMP_NE && RHSCst->isZero() &&
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LHSCC == ICmpInst::ICMP_SLT && LHSCst->isZero()))) {
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BinaryOperator *BO =
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dyn_cast<BinaryOperator>(LHSCC == ICmpInst::ICMP_NE ? Val : Val2);
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ConstantInt *AndCst;
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if (BO && match(BO, m_OneUse(m_And(m_Value(), m_ConstantInt(AndCst))))) {
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APInt New = AndCst->getValue() | APInt::getSignBit(AndCst->getBitWidth());
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BO->setOperand(1, ConstantInt::get(AndCst->getContext(), New));
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return BO == Val ? LHS : RHS;
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}
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}
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// (icmp ult (X + CA), C1) | (icmp eq X, C2) -> (icmp ule (X + CA), C1)
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// iff C2 + CA == C1.
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if (LHSCC == ICmpInst::ICMP_ULT && RHSCC == ICmpInst::ICMP_EQ) {
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@ -77,3 +77,83 @@ if.then:
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if.end:
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ret void
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}
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define void @test5(i32 %a) nounwind {
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%and = and i32 %a, 134217728
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%1 = icmp eq i32 %and, 0
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%2 = icmp sgt i32 %a, -1
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%or.cond = and i1 %1, %2
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br i1 %or.cond, label %if.then, label %if.end
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; CHECK: @test5
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; CHECK-NEXT: %and = and i32 %a, -2013265920
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; CHECK-NEXT: %1 = icmp eq i32 %and, 0
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; CHECK-NEXT: br i1 %1, label %if.then, label %if.end
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if.then:
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tail call void @foo() nounwind
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ret void
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if.end:
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ret void
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}
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define void @test6(i32 %a) nounwind {
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%1 = icmp sgt i32 %a, -1
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%and = and i32 %a, 134217728
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%2 = icmp eq i32 %and, 0
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%or.cond = and i1 %1, %2
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br i1 %or.cond, label %if.then, label %if.end
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; CHECK: @test6
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; CHECK-NEXT: %and = and i32 %a, -2013265920
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; CHECK-NEXT: %1 = icmp eq i32 %and, 0
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; CHECK-NEXT: br i1 %1, label %if.then, label %if.end
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if.then:
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tail call void @foo() nounwind
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ret void
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if.end:
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ret void
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}
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define void @test7(i32 %a) nounwind {
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%and = and i32 %a, 134217728
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%1 = icmp ne i32 %and, 0
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%2 = icmp slt i32 %a, 0
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%or.cond = or i1 %1, %2
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br i1 %or.cond, label %if.then, label %if.end
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; CHECK: @test7
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; CHECK-NEXT: %and = and i32 %a, -2013265920
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; CHECK-NEXT: %1 = icmp eq i32 %and, 0
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; CHECK-NEXT: br i1 %1, label %if.end, label %if.the
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if.then:
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tail call void @foo() nounwind
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ret void
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if.end:
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ret void
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}
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define void @test8(i32 %a) nounwind {
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%1 = icmp slt i32 %a, 0
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%and = and i32 %a, 134217728
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%2 = icmp ne i32 %and, 0
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%or.cond = or i1 %1, %2
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br i1 %or.cond, label %if.then, label %if.end
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; CHECK: @test8
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; CHECK-NEXT: %and = and i32 %a, -2013265920
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; CHECK-NEXT: %1 = icmp eq i32 %and, 0
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; CHECK-NEXT: br i1 %1, label %if.end, label %if.the
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if.then:
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tail call void @foo() nounwind
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ret void
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if.end:
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ret void
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}
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