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Eliminate usage of MRegisterInfo::getRegClass(physreg)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17240 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -48,6 +48,13 @@ PPC64RegisterInfo::PPC64RegisterInfo()
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ImmToIdxMap[PPC::ADDI] = PPC::ADD;
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}
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static const TargetRegisterClass *getClass(unsigned SrcReg) {
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if (PPC64::FPRCRegisterClass->contains(SrcReg))
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return PPC64::FPRCRegisterClass;
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assert(PPC64::GPRCRegisterClass->contains(SrcReg) && "Reg not FPR or GPR");
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return PPC64::GPRCRegisterClass;
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}
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static unsigned getIdx(const TargetRegisterClass *RC) {
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if (RC == PPC64::GPRCRegisterClass) {
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switch (RC->getSize()) {
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@ -75,8 +82,7 @@ PPC64RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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static const unsigned Opcode[] = {
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PPC::STB, PPC::STH, PPC::STW, PPC::STD, PPC::STFS, PPC::STFD
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};
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const TargetRegisterClass *RC = getRegClass(SrcReg);
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unsigned OC = Opcode[getIdx(RC)];
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unsigned OC = Opcode[getIdx(getClass(SrcReg))];
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if (SrcReg == PPC::LR) {
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BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11).addReg(PPC::LR);
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BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
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@ -94,8 +100,7 @@ PPC64RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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static const unsigned Opcode[] = {
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PPC::LBZ, PPC::LHZ, PPC::LWZ, PPC::LD, PPC::LFS, PPC::LFD
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};
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const TargetRegisterClass *RC = getRegClass(DestReg);
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unsigned OC = Opcode[getIdx(RC)];
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unsigned OC = Opcode[getIdx(getClass(DestReg))];
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if (DestReg == PPC::LR) {
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BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
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addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx);
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@ -48,6 +48,13 @@ PPC32RegisterInfo::PPC32RegisterInfo()
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ImmToIdxMap[PPC::ADDI] = PPC::ADD;
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}
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static const TargetRegisterClass *getClass(unsigned SrcReg) {
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if (PPC32::FPRCRegisterClass->contains(SrcReg))
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return PPC32::FPRCRegisterClass;
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assert(PPC32::GPRCRegisterClass->contains(SrcReg) && "Reg not FPR or GPR");
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return PPC32::GPRCRegisterClass;
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}
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static unsigned getIdx(const TargetRegisterClass *RC) {
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if (RC == PPC32::GPRCRegisterClass) {
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switch (RC->getSize()) {
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@ -71,12 +78,10 @@ void
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PPC32RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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unsigned SrcReg, int FrameIdx) const {
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const TargetRegisterClass *RC = getRegClass(SrcReg);
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static const unsigned Opcode[] = {
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PPC::STB, PPC::STH, PPC::STW, PPC::STFS, PPC::STFD
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};
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unsigned OC = Opcode[getIdx(RC)];
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unsigned OC = Opcode[getIdx(getClass(SrcReg))];
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if (SrcReg == PPC::LR) {
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BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11).addReg(PPC::LR);
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BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
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@ -94,8 +99,7 @@ PPC32RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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static const unsigned Opcode[] = {
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PPC::LBZ, PPC::LHZ, PPC::LWZ, PPC::LFS, PPC::LFD
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};
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const TargetRegisterClass *RC = getRegClass(DestReg);
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unsigned OC = Opcode[getIdx(RC)];
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unsigned OC = Opcode[getIdx(getClass(DestReg))];
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if (DestReg == PPC::LR) {
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BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
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addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx);
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