From dfed413ef6bfb05754ee5a9f3a3c7f98c764a374 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 10 Jul 2009 07:38:24 +0000 Subject: [PATCH] eliminate GVRequiresRegister, replacing it with predicates we need for other purposes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75243 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 14 +++++++++----- lib/Target/X86/X86Subtarget.cpp | 14 -------------- lib/Target/X86/X86Subtarget.h | 5 ----- 3 files changed, 9 insertions(+), 24 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index cd87553fef1..11a75966955 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -7036,12 +7036,16 @@ bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM, return false; if (AM.BaseGV) { - // We can only fold this if we don't need an extra load. - if (Subtarget->GVRequiresExtraLoad(AM.BaseGV, getTargetMachine())) + unsigned GVFlags = + Subtarget->ClassifyGlobalReference(AM.BaseGV, getTargetMachine()); + + // If a reference to this global requires an extra load, we can't fold it. + if (isGlobalStubReference(GVFlags)) return false; - // If BaseGV requires a register, we cannot also have a BaseReg. - if (Subtarget->GVRequiresRegister(AM.BaseGV, getTargetMachine()) && - AM.HasBaseReg) + + // If BaseGV requires a register for the PIC base, we cannot also have a + // BaseReg specified. + if (AM.HasBaseReg && isGlobalRelativeToPICBase(GVFlags)) return false; // X86-64 only supports addr of globals in small code model. diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index d9c915a696b..82eee216bdb 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -120,20 +120,6 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue *GV, return isGlobalStubReference(ClassifyGlobalReference(GV, TM)); } -/// True if accessing the GV requires a register. This is a superset of the -/// cases where GVRequiresExtraLoad is true. Some variations of PIC require -/// a register, but not an extra load. -bool X86Subtarget::GVRequiresRegister(const GlobalValue *GV, - const TargetMachine &TM) const { - if (GVRequiresExtraLoad(GV, TM)) - return true; - - // Code below here need only consider cases where GVRequiresExtraLoad - // returns false. - if (TM.getRelocationModel() == Reloc::PIC_) - return GV->hasLocalLinkage() || GV->hasExternalLinkage(); - return false; -} /// getBZeroEntry - This function returns the name of a function which has an /// interface like the non-standard bzero function, if such a function exists on diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index 2990df52342..f67ba0b4d76 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -206,11 +206,6 @@ public: /// or index register of the address, not the GV offset field. bool GVRequiresExtraLoad(const GlobalValue *GV, const TargetMachine &TM)const; - /// True if accessing the GV requires a register. This is a superset of the - /// cases where GVRequiresExtraLoad is true. Some variations of PIC require - /// a register, but not an extra load. - bool GVRequiresRegister(const GlobalValue *GV, const TargetMachine &TM) const; - /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls /// to immediate address. bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const;