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MachineVerifier: slightly simplify code that is only called with vregs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233216 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1650,10 +1650,10 @@ void MachineVerifier::verifyLiveRange(const LiveRange &LR, unsigned Reg,
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}
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void MachineVerifier::verifyLiveInterval(const LiveInterval &LI) {
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verifyLiveRange(LI, LI.reg);
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unsigned Reg = LI.reg;
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if (TargetRegisterInfo::isVirtualRegister(Reg)) {
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assert(TargetRegisterInfo::isVirtualRegister(Reg));
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verifyLiveRange(LI, Reg);
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unsigned Mask = 0;
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unsigned MaxMask = MRI->getMaxLaneMaskForVReg(Reg);
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for (const LiveInterval::SubRange &SR : LI.subranges()) {
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@ -1666,12 +1666,8 @@ void MachineVerifier::verifyLiveInterval(const LiveInterval &LI) {
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if (!LI.covers(SR))
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report("A Subrange is not covered by the main range", MF, LI);
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}
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} else if (LI.hasSubRanges()) {
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report("subregister liveness only allowed for virtual registers", MF, LI);
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}
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// Check the LI only has one connected component.
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if (TargetRegisterInfo::isVirtualRegister(LI.reg)) {
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ConnectedVNInfoEqClasses ConEQ(*LiveInts);
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unsigned NumComp = ConEQ.Classify(&LI);
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if (NumComp > 1) {
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@ -1685,7 +1681,6 @@ void MachineVerifier::verifyLiveInterval(const LiveInterval &LI) {
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errs() << '\n';
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}
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}
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}
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}
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namespace {
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