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AMDGPU/SI: Fix crash on physical registers in SIInstrInfo::isOperandLegal()

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No test case for this.  I ran into it while working on some improvements
to SIShrinkInstructions.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241816 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2015-07-09 16:30:27 +00:00
parent c9799867af
commit e05910e677
1 changed files with 4 additions and 1 deletions
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5
lib/Target/AMDGPU/SIInstrInfo.cpp
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@ -1625,7 +1625,10 @@ bool SIInstrInfo::isOperandLegal(const MachineInstr *MI, unsigned OpIdx,
if (MO->isReg()) {
assert(DefinedRC);
const TargetRegisterClass *RC = MRI.getRegClass(MO->getReg());
const TargetRegisterClass *RC =
TargetRegisterInfo::isVirtualRegister(MO->getReg()) ?
MRI.getRegClass(MO->getReg()) :
RI.getPhysRegClass(MO->getReg());
// In order to be legal, the common sub-class must be equal to the
// class of the current operand. For example: