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ARM tighten up the register classes for the PKH instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139748 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3857,37 +3857,38 @@ def : ARMV6Pat<(or (sra (shl GPR:$Rm, (i32 24)), (i32 16)),
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(and (srl GPR:$Rm, (i32 8)), 0xFF)),
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(REVSH GPR:$Rm)>;
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def PKHBT : APKHI<0b01101000, 0, (outs GPR:$Rd),
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(ins GPR:$Rn, GPR:$Rm, pkh_lsl_amt:$sh),
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def PKHBT : APKHI<0b01101000, 0, (outs GPRnopc:$Rd),
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(ins GPRnopc:$Rn, GPRnopc:$Rm, pkh_lsl_amt:$sh),
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IIC_iALUsi, "pkhbt", "\t$Rd, $Rn, $Rm$sh",
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[(set GPR:$Rd, (or (and GPR:$Rn, 0xFFFF),
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(and (shl GPR:$Rm, pkh_lsl_amt:$sh),
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0xFFFF0000)))]>,
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[(set GPRnopc:$Rd, (or (and GPRnopc:$Rn, 0xFFFF),
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(and (shl GPRnopc:$Rm, pkh_lsl_amt:$sh),
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0xFFFF0000)))]>,
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Requires<[IsARM, HasV6]>;
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// Alternate cases for PKHBT where identities eliminate some nodes.
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def : ARMV6Pat<(or (and GPR:$Rn, 0xFFFF), (and GPR:$Rm, 0xFFFF0000)),
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(PKHBT GPR:$Rn, GPR:$Rm, 0)>;
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def : ARMV6Pat<(or (and GPR:$Rn, 0xFFFF), (shl GPR:$Rm, imm16_31:$sh)),
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(PKHBT GPR:$Rn, GPR:$Rm, imm16_31:$sh)>;
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def : ARMV6Pat<(or (and GPRnopc:$Rn, 0xFFFF), (and GPRnopc:$Rm, 0xFFFF0000)),
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(PKHBT GPRnopc:$Rn, GPRnopc:$Rm, 0)>;
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def : ARMV6Pat<(or (and GPRnopc:$Rn, 0xFFFF), (shl GPRnopc:$Rm, imm16_31:$sh)),
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(PKHBT GPRnopc:$Rn, GPRnopc:$Rm, imm16_31:$sh)>;
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// Note: Shifts of 1-15 bits will be transformed to srl instead of sra and
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// will match the pattern below.
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def PKHTB : APKHI<0b01101000, 1, (outs GPR:$Rd),
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(ins GPR:$Rn, GPR:$Rm, pkh_asr_amt:$sh),
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def PKHTB : APKHI<0b01101000, 1, (outs GPRnopc:$Rd),
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(ins GPRnopc:$Rn, GPRnopc:$Rm, pkh_asr_amt:$sh),
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IIC_iBITsi, "pkhtb", "\t$Rd, $Rn, $Rm$sh",
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[(set GPR:$Rd, (or (and GPR:$Rn, 0xFFFF0000),
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(and (sra GPR:$Rm, pkh_asr_amt:$sh),
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0xFFFF)))]>,
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[(set GPRnopc:$Rd, (or (and GPRnopc:$Rn, 0xFFFF0000),
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(and (sra GPRnopc:$Rm, pkh_asr_amt:$sh),
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0xFFFF)))]>,
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Requires<[IsARM, HasV6]>;
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// Alternate cases for PKHTB where identities eliminate some nodes. Note that
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// a shift amount of 0 is *not legal* here, it is PKHBT instead.
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def : ARMV6Pat<(or (and GPR:$src1, 0xFFFF0000), (srl GPR:$src2, imm16_31:$sh)),
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(PKHTB GPR:$src1, GPR:$src2, imm16_31:$sh)>;
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def : ARMV6Pat<(or (and GPR:$src1, 0xFFFF0000),
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(and (srl GPR:$src2, imm1_15:$sh), 0xFFFF)),
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(PKHTB GPR:$src1, GPR:$src2, imm1_15:$sh)>;
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def : ARMV6Pat<(or (and GPRnopc:$src1, 0xFFFF0000),
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(srl GPRnopc:$src2, imm16_31:$sh)),
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(PKHTB GPRnopc:$src1, GPRnopc:$src2, imm16_31:$sh)>;
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def : ARMV6Pat<(or (and GPRnopc:$src1, 0xFFFF0000),
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(and (srl GPRnopc:$src2, imm1_15:$sh), 0xFFFF)),
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(PKHTB GPRnopc:$src1, GPRnopc:$src2, imm1_15:$sh)>;
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//===----------------------------------------------------------------------===//
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// Comparison Instructions...
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@ -4882,10 +4883,10 @@ def : MnemonicAlias<"stmea", "stm">;
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// PKHBT/PKHTB with default shift amount. PKHTB is equivalent to PKHBT when the
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// shift amount is zero (i.e., unspecified).
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def : InstAlias<"pkhbt${p} $Rd, $Rn, $Rm",
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(PKHBT GPR:$Rd, GPR:$Rn, GPR:$Rm, 0, pred:$p)>,
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(PKHBT GPRnopc:$Rd, GPRnopc:$Rn, GPRnopc:$Rm, 0, pred:$p)>,
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Requires<[IsARM, HasV6]>;
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def : InstAlias<"pkhtb${p} $Rd, $Rn, $Rm",
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(PKHBT GPR:$Rd, GPR:$Rn, GPR:$Rm, 0, pred:$p)>,
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(PKHBT GPRnopc:$Rd, GPRnopc:$Rn, GPRnopc:$Rm, 0, pred:$p)>,
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Requires<[IsARM, HasV6]>;
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// PUSH/POP aliases for STM/LDM
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