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Broaden isSchedulingBoundary to check aliases of SP.

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On PPC the stack pointer is X1, but ADJCALLSTACK writes R1.

Fixes PR14315: Register regmask dependency problem with misched.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168248 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-11-17 03:35:11 +00:00
parent c37f502d48
commit e1f663933a
2 changed files with 35 additions and 1 deletions
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3
lib/CodeGen/TargetInstrInfoImpl.cpp
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@ -472,7 +472,8 @@ bool TargetInstrInfoImpl::isSchedulingBoundary(const MachineInstr *MI,
// stack slot reference to depend on the instruction that does the
// modification.
const TargetLowering &TLI = *MF.getTarget().getTargetLowering();
if (MI->definesRegister(TLI.getStackPointerRegisterToSaveRestore()))
const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
if (MI->modifiesRegister(TLI.getStackPointerRegisterToSaveRestore(), TRI))
return true;
return false;

33
test/CodeGen/PowerPC/2012-11-16-mischedcall.ll Normal file
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@ -0,0 +1,33 @@
; RUN: llc -march=ppc64 -enable-misched < %s | FileCheck %s
;
; PR14315: misched should not move the physreg copy of %t below the calls.
@.str89 = external unnamed_addr constant [6 x i8], align 1
declare void @init() nounwind
declare void @clock() nounwind
; CHECK: %entry
; CHECK: fmr f31, f1
; CHECK: bl _init
define void @s332(double %t) nounwind {
entry:
tail call void @init()
tail call void @clock() nounwind
br label %for.cond2
for.cond2: ; preds = %for.body4, %entry
%i.0 = phi i32 [ %inc, %for.body4 ], [ 0, %entry ]
%cmp3 = icmp slt i32 undef, 16000
br i1 %cmp3, label %for.body4, label %L20
for.body4: ; preds = %for.cond2
%cmp5 = fcmp ogt double undef, %t
%inc = add nsw i32 %i.0, 1
br i1 %cmp5, label %L20, label %for.cond2
L20: ; preds = %for.body4, %for.cond2
%index.0 = phi i32 [ -2, %for.cond2 ], [ %i.0, %for.body4 ]
unreachable
}