MC/Mach-O: Shuffle enums a bit to make it harder to inadvertently use the wrong

type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122334 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar
2010-12-21 15:26:45 +00:00
parent 025c98bdbd
commit e1feeb9da4
3 changed files with 28 additions and 15 deletions

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@@ -22,12 +22,17 @@ class MCMachObjectTargetWriter {
// FIXME: Remove this, we should just always use it once we no longer care // FIXME: Remove this, we should just always use it once we no longer care
// about Darwin 'as' compatibility. // about Darwin 'as' compatibility.
const unsigned UseAggressiveSymbolFolding : 1; const unsigned UseAggressiveSymbolFolding : 1;
unsigned LocalDifference_RIT;
protected: protected:
MCMachObjectTargetWriter(bool Is64Bit_, uint32_t CPUType_, MCMachObjectTargetWriter(bool Is64Bit_, uint32_t CPUType_,
uint32_t CPUSubtype_, uint32_t CPUSubtype_,
bool UseAggressiveSymbolFolding_ = false); bool UseAggressiveSymbolFolding_ = false);
void setLocalDifferenceRelocationType(unsigned Type) {
LocalDifference_RIT = Type;
}
public: public:
virtual ~MCMachObjectTargetWriter(); virtual ~MCMachObjectTargetWriter();
@@ -38,6 +43,9 @@ public:
bool useAggressiveSymbolFolding() const { return UseAggressiveSymbolFolding; } bool useAggressiveSymbolFolding() const { return UseAggressiveSymbolFolding; }
uint32_t getCPUType() const { return CPUType; } uint32_t getCPUType() const { return CPUType; }
uint32_t getCPUSubtype() const { return CPUSubtype; } uint32_t getCPUSubtype() const { return CPUSubtype; }
unsigned getLocalDifferenceRelocationType() const {
return LocalDifference_RIT;
}
/// @} /// @}
}; };

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@@ -317,17 +317,24 @@ namespace macho {
RF_Scattered = 0x80000000 RF_Scattered = 0x80000000
}; };
/// Common relocation info types.
enum RelocationInfoType { enum RelocationInfoType {
RIT_Vanilla = 0, RIT_Vanilla = 0,
RIT_Pair = 1, RIT_Pair = 1,
RIT_Difference = 2, RIT_Difference = 2
RIT_PreboundLazyPointer = 3, };
RIT_LocalDifference = 4,
RIT_TLV = 5 /// Generic relocation info types, which are shared by some (but not all)
/// platforms.
enum RelocationInfoType_Generic {
RIT_Generic_PreboundLazyPointer = 3,
RIT_Generic_LocalDifference = 4,
RIT_Generic_TLV = 5
}; };
/// X86_64 uses its own relocation types. /// X86_64 uses its own relocation types.
enum RelocationInfoTypeX86_64 { enum RelocationInfoTypeX86_64 {
// Note that x86_64 doesn't even share the common relocation types.
RIT_X86_64_Unsigned = 0, RIT_X86_64_Unsigned = 0,
RIT_X86_64_Signed = 1, RIT_X86_64_Signed = 1,
RIT_X86_64_Branch = 2, RIT_X86_64_Branch = 2,
@@ -342,9 +349,6 @@ namespace macho {
/// ARM also has its own relocation types. /// ARM also has its own relocation types.
enum RelocationInfoTypeARM { enum RelocationInfoTypeARM {
RIT_ARM_Vanilla = 0,
RIT_ARM_Pair = 1,
RIT_ARM_Difference = 2,
RIT_ARM_LocalDifference = 3, RIT_ARM_LocalDifference = 3,
RIT_ARM_PreboundLazyPointer = 4, RIT_ARM_PreboundLazyPointer = 4,
RIT_ARM_Branch24Bit = 5, RIT_ARM_Branch24Bit = 5,

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@@ -766,13 +766,14 @@ public:
// relocation types from the linkers point of view, this is done solely // relocation types from the linkers point of view, this is done solely
// for pedantic compatibility with 'as'. // for pedantic compatibility with 'as'.
Type = A_SD->isExternal() ? macho::RIT_Difference : Type = A_SD->isExternal() ? macho::RIT_Difference :
macho::RIT_LocalDifference; macho::RIT_Generic_LocalDifference;
Value2 = getSymbolAddress(B_SD, Layout); Value2 = getSymbolAddress(B_SD, Layout);
FixedValue -= getSectionAddress(B_SD->getFragment()->getParent()); FixedValue -= getSectionAddress(B_SD->getFragment()->getParent());
} }
// Relocations are written out in reverse order, so the PAIR comes first. // Relocations are written out in reverse order, so the PAIR comes first.
if (Type == macho::RIT_Difference || Type == macho::RIT_LocalDifference) { if (Type == macho::RIT_Difference ||
Type == macho::RIT_Generic_LocalDifference) {
macho::RelocationEntry MRE; macho::RelocationEntry MRE;
MRE.Word0 = ((0 << 0) | MRE.Word0 = ((0 << 0) |
(macho::RIT_Pair << 24) | (macho::RIT_Pair << 24) |
@@ -834,7 +835,7 @@ public:
(IsPCRel << 24) | (IsPCRel << 24) |
(Log2Size << 25) | (Log2Size << 25) |
(1 << 27) | // Extern (1 << 27) | // Extern
(macho::RIT_TLV << 28)); // Type (macho::RIT_Generic_TLV << 28)); // Type
Relocations[Fragment->getParent()].push_back(MRE); Relocations[Fragment->getParent()].push_back(MRE);
} }