6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-19 19:29:31 +00:00
Code Issues Projects Releases Wiki Activity

disable this code for now, it's not yet safely updating phi nodes

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31124 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-10-22 22:47:10 +00:00
parent 7e189d095e
commit e236ac64a2
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -873,8 +873,8 @@ void SelectionDAGLowering::visitJumpTable(SelectionDAGISel::JumpTable &JT) {
Reloc = DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, PTy);
else
Reloc = TAB;
ADD = DAG.getNode(ISD::ADD, PTy,
((PTy != MVT::i32) ? DAG.getNode(ISD::SIGN_EXTEND, PTy, LD) : LD), Reloc);
ADD = (PTy != MVT::i32) ? DAG.getNode(ISD::SIGN_EXTEND, PTy, LD) : LD;
ADD = DAG.getNode(ISD::ADD, PTy, ADD, Reloc);
DAG.setRoot(DAG.getNode(ISD::BRIND, MVT::Other, LD.getValue(1), ADD));
} else {
DAG.setRoot(DAG.getNode(ISD::BRIND, MVT::Other, LD.getValue(1), LD));
@ -930,7 +930,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) {
// If the switch has few cases (two or less) emit a series of specific
// tests.
if (Cases.size() < 3) {
if (0 && Cases.size() < 3) {
// TODO: If any two of the cases has the same destination, and if one value
// is the same as the other, but has one bit unset that the other has set,
// use bit manipulation to do two compares at once. For example: