diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index 2bc100070f6..8cfef94bb15 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -431,8 +431,8 @@ public: /// EmitDwarfRegOp - Emit a dwarf register operation. /// \param Indirect whether this is a register-indirect address - virtual void EmitDwarfRegOp(ByteStreamer &BS, const MachineLocation &MLoc, - bool Indirect) const; + virtual void EmitDwarfRegOp(ByteStreamer &BS, + const MachineLocation &MLoc) const; //===------------------------------------------------------------------===// // Dwarf Lowering Routines diff --git a/include/llvm/IR/DebugInfo.h b/include/llvm/IR/DebugInfo.h index 5c85d6d5282..75209225a50 100644 --- a/include/llvm/IR/DebugInfo.h +++ b/include/llvm/IR/DebugInfo.h @@ -138,9 +138,8 @@ public: FlagObjectPointer = 1 << 10, FlagVector = 1 << 11, FlagStaticMember = 1 << 12, - FlagIndirectVariable = 1 << 13, - FlagLValueReference = 1 << 14, - FlagRValueReference = 1 << 15 + FlagLValueReference = 1 << 13, + FlagRValueReference = 1 << 14 }; protected: @@ -816,11 +815,6 @@ public: return (getHeaderFieldAs(3) & FlagObjectPointer) != 0; } - /// \brief Return true if this variable is represented as a pointer. - bool isIndirect() const { - return (getHeaderFieldAs(3) & FlagIndirectVariable) != 0; - } - /// \brief If this variable is inlined then return inline location. MDNode *getInlinedAt() const; diff --git a/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp b/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp index 00681f6ce8c..3900b95d0a4 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp @@ -228,14 +228,13 @@ void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer, /// EmitDwarfRegOp - Emit dwarf register operation. void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer, - const MachineLocation &MLoc, - bool Indirect) const { + const MachineLocation &MLoc) const { DebugLocDwarfExpression Expr(*this, Streamer); const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo(); int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false); if (Reg < 0) { // We assume that pointers are always in an addressable register. - if (Indirect || MLoc.isIndirect()) + if (MLoc.isIndirect()) // FIXME: We have no reasonable way of handling errors in here. The // caller might be in the middle of a dwarf expression. We should // probably assert that Reg >= 0 once debug info generation is more @@ -251,9 +250,7 @@ void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer, } if (MLoc.isIndirect()) - Expr.AddRegIndirect(Reg, MLoc.getOffset(), Indirect); - else if (Indirect) - Expr.AddRegIndirect(Reg, 0, false); + Expr.AddRegIndirect(Reg, MLoc.getOffset()); else Expr.AddReg(Reg); } diff --git a/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp b/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp index b4dba9c5923..155cd4c0191 100644 --- a/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp @@ -737,18 +737,16 @@ void DwarfCompileUnit::addVariableAddress(const DbgVariable &DV, DIE &Die, else if (DV.isBlockByrefVariable()) addBlockByrefAddress(DV, Die, dwarf::DW_AT_location, Location); else - addAddress(Die, dwarf::DW_AT_location, Location, - DV.getVariable().isIndirect()); + addAddress(Die, dwarf::DW_AT_location, Location); } /// Add an address attribute to a die based on the location provided. void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute, - const MachineLocation &Location, - bool Indirect) { + const MachineLocation &Location) { DIELoc *Loc = new (DIEValueAllocator) DIELoc(); bool validReg; - if (Location.isReg() && !Indirect) + if (Location.isReg()) validReg = addRegisterOpPiece(*Loc, Location.getReg()); else validReg = addRegisterOffset(*Loc, Location.getReg(), Location.getOffset()); @@ -756,9 +754,6 @@ void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute, if (!validReg) return; - if (!Location.isReg() && Indirect) - addUInt(*Loc, dwarf::DW_FORM_data1, dwarf::DW_OP_deref); - // Now attach the location information to the DIE. addBlock(Die, Attribute, Loc); } @@ -775,16 +770,10 @@ void DwarfCompileUnit::addComplexAddress(const DbgVariable &DV, DIE &Die, DIExpression Expr = DV.getExpression(); if (Location.getOffset()) { if (DwarfExpr.AddMachineRegIndirect(Location.getReg(), - Location.getOffset())) { + Location.getOffset())) DwarfExpr.AddExpression(Expr); - assert(!DV.getVariable().isIndirect() - && "double indirection not handled"); - } - } else { - if (DwarfExpr.AddMachineRegExpression(Expr, Location.getReg())) - if (DV.getVariable().isIndirect()) - DwarfExpr.EmitOp(dwarf::DW_OP_deref); - } + } else + DwarfExpr.AddMachineRegExpression(Expr, Location.getReg()); // Now attach the location information to the DIE. addBlock(Die, Attribute, Loc); diff --git a/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h b/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h index 91164bc7aa2..c66af6519c3 100644 --- a/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h +++ b/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h @@ -213,7 +213,7 @@ public: MachineLocation Location); /// Add an address attribute to a die based on the location provided. void addAddress(DIE &Die, dwarf::Attribute Attribute, - const MachineLocation &Location, bool Indirect = false); + const MachineLocation &Location); /// Start with the address based on the location provided, and generate the /// DWARF information necessary to find the actual variable (navigating the diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index a587b46c4ba..c00c40712c5 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -1683,14 +1683,12 @@ void DwarfDebug::emitLocPieces(ByteStreamer &Streamer, #ifndef NDEBUG DIVariable Var = Piece.getVariable(); - assert(!Var.isIndirect() && "indirect address for piece"); unsigned VarSize = Var.getSizeInBits(Map); assert(PieceSize+PieceOffset <= VarSize/SizeOfByte && "piece is larger than or outside of variable"); assert(PieceSize*SizeOfByte != VarSize && "piece covers entire variable"); #endif - emitDebugLocValue(Streamer, Piece, PieceOffset*SizeOfByte); } } @@ -1726,7 +1724,7 @@ void DwarfDebug::emitDebugLocValue(ByteStreamer &Streamer, DIExpression Expr = Value.getExpression(); if (!Expr || (Expr.getNumElements() == 0)) // Regular entry. - Asm->EmitDwarfRegOp(Streamer, Loc, DV.isIndirect()); + Asm->EmitDwarfRegOp(Streamer, Loc); else { // Complex address entry. if (Loc.getOffset()) { @@ -1735,8 +1733,6 @@ void DwarfDebug::emitDebugLocValue(ByteStreamer &Streamer, } else DwarfExpr.AddMachineRegExpression(Expr, Loc.getReg(), PieceOffsetInBits); - if (DV.isIndirect()) - DwarfExpr.EmitOp(dwarf::DW_OP_deref); } } // else ... ignore constant fp. There is not any good way to diff --git a/test/DebugInfo/AArch64/struct_by_value.ll b/test/DebugInfo/AArch64/struct_by_value.ll index f66f56cef5b..9996d276927 100644 --- a/test/DebugInfo/AArch64/struct_by_value.ll +++ b/test/DebugInfo/AArch64/struct_by_value.ll @@ -32,7 +32,7 @@ target triple = "arm64-apple-ios3.0.0" ; Function Attrs: nounwind ssp define i32 @return_five_int(%struct.five* %f) #0 { entry: - call void @llvm.dbg.declare(metadata %struct.five* %f, metadata !17, metadata !{!"0x102"}), !dbg !18 + call void @llvm.dbg.declare(metadata %struct.five* %f, metadata !17, metadata !{!"0x102\006"}), !dbg !18 %a = getelementptr inbounds %struct.five* %f, i32 0, i32 0, !dbg !19 %0 = load i32* %a, align 4, !dbg !19 ret i32 %0, !dbg !19 @@ -64,7 +64,7 @@ attributes #1 = { nounwind readnone } !14 = !{!"0xd\00d\006\0032\0032\0096\000", !1, !9, !8} ; [ DW_TAG_member ] [d] [line 6, size 32, align 32, offset 96] [from int] !15 = !{!"0xd\00e\007\0032\0032\00128\000", !1, !9, !8} ; [ DW_TAG_member ] [e] [line 7, size 32, align 32, offset 128] [from int] !16 = !{i32 2, !"Dwarf Version", i32 2} -!17 = !{!"0x101\00f\0016777229\008192", !4, !5, !9} ; [ DW_TAG_arg_variable ] [f] [line 13] +!17 = !{!"0x101\00f\0016777229\000", !4, !5, !9} ; [ DW_TAG_arg_variable ] [f] [line 13] !18 = !MDLocation(line: 13, scope: !4) !19 = !MDLocation(line: 16, scope: !4) !20 = !{i32 1, !"Debug Info Version", i32 2} diff --git a/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll b/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll index 2e137678e0e..8d750696966 100644 --- a/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll +++ b/test/DebugInfo/ARM/lowerbdgdeclare_vla.ll @@ -23,7 +23,7 @@ entry: %conv = fptosi float %r to i32, !dbg !23 tail call void @llvm.dbg.declare(metadata i32 %conv, metadata !12, metadata !{!"0x102"}), !dbg !23 %vla = alloca float, i32 %conv, align 4, !dbg !24 - tail call void @llvm.dbg.declare(metadata float* %vla, metadata !14, metadata !{!"0x102"}), !dbg !24 + tail call void @llvm.dbg.declare(metadata float* %vla, metadata !14, metadata !{!"0x102\006"}), !dbg !24 ; The VLA alloca should be described by a dbg.declare: ; CHECK: call void @llvm.dbg.declare(metadata float* %vla, metadata ![[VLA:.*]], metadata {{.*}}) ; The VLA alloca and following store into the array should not be lowered to like this: @@ -81,7 +81,7 @@ attributes #1 = { nounwind readnone } !11 = !{!"0x101\00r\0016777217\000", !4, !6, !9} ; [ DW_TAG_arg_variable ] [r] [line 1] !12 = !{!"0x100\00count\003\000", !4, !6, !13} ; [ DW_TAG_auto_variable ] [count] [line 3] !13 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!14 = !{!"0x100\00vla\004\008192", !4, !6, !15} ; [ DW_TAG_auto_variable ] [vla] [line 4] +!14 = !{!"0x100\00vla\004\000", !4, !6, !15} ; [ DW_TAG_auto_variable ] [vla] [line 4] !15 = !{!"0x1\00\000\000\0032\000\000", null, null, !9, !16, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from float] !16 = !{!17} !17 = !{!"0x21\000\00-1"} ; [ DW_TAG_subrange_type ] [unbounded] diff --git a/test/DebugInfo/ARM/selectiondag-deadcode.ll b/test/DebugInfo/ARM/selectiondag-deadcode.ll index 0626d2f1f66..a974692a829 100644 --- a/test/DebugInfo/ARM/selectiondag-deadcode.ll +++ b/test/DebugInfo/ARM/selectiondag-deadcode.ll @@ -13,7 +13,7 @@ _ZN7Vector39NormalizeEv.exit: ; preds = %1, %0 ; and SelectionDAGISel crashes. It should definitely not ; crash. Drop the dbg_value instead. ; CHECK-NOT: "matrix" - tail call void @llvm.dbg.declare(metadata %class.Matrix3.0.6.10* %agg.result, metadata !45, metadata !{!"0x102"}) + tail call void @llvm.dbg.declare(metadata %class.Matrix3.0.6.10* %agg.result, metadata !45, metadata !{!"0x102\006"}) %2 = getelementptr inbounds %class.Matrix3.0.6.10* %agg.result, i32 0, i32 0, i32 8 ret void } @@ -24,4 +24,4 @@ declare arm_aapcscc void @_ZL4Sqrtd() #2 !39 = !{!"0x2e\00GetMatrix\00GetMatrix\00_Z9GetMatrixv\0032\000\001\000\006\00256\001\0032", !5, !40, !41, null, void (%class.Matrix3.0.6.10*)* @_Z9GetMatrixv, null, null, null} ; [ DW_TAG_subprogram ] [line 32] [def] [GetMatrix] !40 = !{!"0x29", !5} ; [ DW_TAG_file_type ] [/Volumes/Data/radar/15094721/test.ii] !41 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, null, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] -!45 = !{!"0x100\00matrix\0035\008192", !39, !40, !4} ; [ DW_TAG_auto_variable ] [matrix] [line 35] +!45 = !{!"0x100\00matrix\0035\000", !39, !40, !4} ; [ DW_TAG_auto_variable ] [matrix] [line 35] diff --git a/test/DebugInfo/X86/dbg_value_direct.ll b/test/DebugInfo/X86/dbg_value_direct.ll index 69c9e99519b..6723ba56913 100644 --- a/test/DebugInfo/X86/dbg_value_direct.ll +++ b/test/DebugInfo/X86/dbg_value_direct.ll @@ -70,7 +70,7 @@ entry: ;