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Thumb unconditional branch binary encoding. rdar://8754994

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121496 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-12-10 18:21:33 +00:00
parent 0108645139
commit e246717c3a
7 changed files with 34 additions and 3 deletions
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1
lib/MC/ELFObjectWriter.cpp
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@ -1558,6 +1558,7 @@ unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target,
case ARM::fixup_arm_thumb_bl:
case ARM::fixup_arm_thumb_cb:
case ARM::fixup_arm_thumb_cp:
case ARM::fixup_arm_thumb_br:
assert(0 && "Unimplemented"); break;
case ARM::fixup_arm_branch:
Type = ELF::R_ARM_CALL; break;

4
lib/Target/ARM/ARMAsmBackend.cpp
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@ -200,6 +200,9 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
uint32_t Binary = (Value - 4) >> 1;
return ((Binary & 0x20) << 9) | ((Binary & 0x1f) << 3);
}
case ARM::fixup_arm_thumb_br:
// Offset by 4 and don't encode the lower bit, which is always 0.
return ((Value - 4) >> 1) & 0x7ff;
case ARM::fixup_arm_thumb_bcc:
// Offset by 4 and don't encode the lower bit, which is always 0.
return ((Value - 4) >> 1) & 0xff;
@ -317,6 +320,7 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
case ARM::fixup_arm_thumb_cp:
return 1;
case ARM::fixup_arm_thumb_br:
case ARM::fixup_arm_thumb_cb:
return 2;

2
lib/Target/ARM/ARMCodeEmitter.cpp
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@ -175,6 +175,8 @@ namespace {
const { return 0; }
unsigned getThumbBLXTargetOpValue(const MachineInstr &MI, unsigned Op)
const { return 0; }
unsigned getThumbBRTargetOpValue(const MachineInstr &MI, unsigned Op)
const { return 0; }
unsigned getThumbBCCTargetOpValue(const MachineInstr &MI, unsigned Op)
const { return 0; }
unsigned getThumbCBTargetOpValue(const MachineInstr &MI, unsigned Op)

3
lib/Target/ARM/ARMFixupKinds.h
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@ -40,6 +40,9 @@ enum Fixups {
// instructions.
fixup_t2_branch,
// fixup_arm_thumb_br - 12-bit fixup for Thumb B instructions.
fixup_arm_thumb_br,
// fixup_arm_thumb_blx - Fixup for Thumb BL instructions.
fixup_arm_thumb_bl,

12
lib/Target/ARM/ARMInstrThumb.td
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@ -74,6 +74,10 @@ def t_imm_s4 : Operand<i32> {
// Define Thumb specific addressing modes.
def t_brtarget : Operand<OtherVT> {
let EncoderMethod = "getThumbBRTargetOpValue";
}
def t_bcctarget : Operand<i32> {
let EncoderMethod = "getThumbBCCTargetOpValue";
}
@ -492,11 +496,15 @@ let isCall = 1,
let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
let isPredicable = 1 in
def tB : T1I<(outs), (ins brtarget:$target), IIC_Br,
def tB : T1I<(outs), (ins t_brtarget:$target), IIC_Br,
"b\t$target", [(br bb:$target)]>,
T1Encoding<{1,1,1,0,0,?}>;
T1Encoding<{1,1,1,0,0,?}> {
bits<11> target;
let Inst{10-0} = target;
}
// Far jump
// FIXME: Encoding. This should probably be a pseudo for tBL
let Defs = [LR] in
def tBfar : TIx2<0b11110, 0b11, 1, (outs), (ins brtarget:$target), IIC_Br,
"bl\t$target",[]>;

12
lib/Target/ARM/ARMMCCodeEmitter.cpp
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@ -59,6 +59,7 @@ public:
{ "fixup_arm_thumb_blx", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_thumb_cb", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_thumb_cp", 1, 8, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_thumb_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_thumb_bcc", 1, 8, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_arm_movt_hi16", 0, 16, 0 },
{ "fixup_arm_movw_lo16", 0, 16, 0 },
@ -101,6 +102,10 @@ public:
uint32_t getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const;
/// getThumbBRTargetOpValue - Return encoding info for Thumb branch target.
uint32_t getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const;
/// getThumbBCCTargetOpValue - Return encoding info for Thumb branch target.
uint32_t getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const;
@ -457,6 +462,13 @@ getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx,
return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_blx, Fixups);
}
/// getThumbBRTargetOpValue - Return encoding info for Thumb branch target.
uint32_t ARMMCCodeEmitter::
getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const {
return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_br, Fixups);
}
/// getThumbBCCTargetOpValue - Return encoding info for Thumb branch target.
uint32_t ARMMCCodeEmitter::
getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx,

1
utils/TableGen/EDEmitter.cpp
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@ -587,6 +587,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
IMM("neon_vcvt_imm32");
MISC("brtarget", "kOperandTypeARMBranchTarget"); // ?
MISC("t_brtarget", "kOperandTypeARMBranchTarget"); // ?
MISC("t_bcctarget", "kOperandTypeARMBranchTarget"); // ?
MISC("t_cbtarget", "kOperandTypeARMBranchTarget"); // ?
MISC("bltarget", "kOperandTypeARMBranchTarget"); // ?