mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-30 19:55:11 +00:00
Work on LiveRange instead of LiveInterval where possible
Also change some pointer arguments to references at some places where 0-pointers are not allowed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192396 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun
parent
a4aed9ae39
commit
e25dde550b
@ -127,7 +127,7 @@ namespace llvm {
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LiveInterval &createAndComputeVirtRegInterval(unsigned Reg) {
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LiveInterval &LI = createEmptyInterval(Reg);
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computeVirtRegInterval(&LI);
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computeVirtRegInterval(LI);
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return LI;
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}
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@ -160,7 +160,7 @@ namespace llvm {
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/// extended to be live out of the basic block.
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///
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/// See also LiveRangeCalc::extend().
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void extendToIndices(LiveInterval *LI, ArrayRef<SlotIndex> Indices);
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void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices);
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/// pruneValue - If an LI value is live at Kill, prune its live range by
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/// removing any liveness reachable from Kill. Add live range end points to
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@ -369,7 +369,7 @@ namespace llvm {
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if (!LI) {
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// Compute missing ranges on demand.
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RegUnitIntervals[Unit] = LI = new LiveInterval(Unit, HUGE_VALF);
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computeRegUnitInterval(LI);
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computeRegUnitInterval(*LI);
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}
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return *LI;
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}
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@ -397,8 +397,8 @@ namespace llvm {
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void dumpInstrs() const;
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void computeLiveInRegUnits();
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void computeRegUnitInterval(LiveInterval*);
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void computeVirtRegInterval(LiveInterval*);
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void computeRegUnitInterval(LiveInterval&);
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void computeVirtRegInterval(LiveInterval&);
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class HMEditor;
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};
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@ -177,9 +177,9 @@ LiveInterval* LiveIntervals::createInterval(unsigned reg) {
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/// computeVirtRegInterval - Compute the live interval of a virtual register,
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/// based on defs and uses.
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void LiveIntervals::computeVirtRegInterval(LiveInterval *LI) {
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void LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
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assert(LRCalc && "LRCalc not initialized.");
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assert(LI->empty() && "Should only compute empty intervals.");
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assert(LI.empty() && "Should only compute empty intervals.");
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LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
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LRCalc->createDeadDefs(LI);
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LRCalc->extendToUses(LI);
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@ -230,8 +230,8 @@ void LiveIntervals::computeRegMasks() {
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/// computeRegUnitInterval - Compute the live interval of a register unit, based
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/// on the uses and defs of aliasing registers. The interval should be empty,
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/// or contain only dead phi-defs from ABI blocks.
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void LiveIntervals::computeRegUnitInterval(LiveInterval *LI) {
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unsigned Unit = LI->reg;
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void LiveIntervals::computeRegUnitInterval(LiveInterval &LI) {
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unsigned Unit = LI.reg;
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assert(LRCalc && "LRCalc not initialized.");
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LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
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@ -305,7 +305,7 @@ void LiveIntervals::computeLiveInRegUnits() {
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// Compute the 'normal' part of the intervals.
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for (unsigned i = 0, e = NewIntvs.size(); i != e; ++i)
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computeRegUnitInterval(NewIntvs[i]);
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computeRegUnitInterval(*NewIntvs[i]);
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}
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@ -440,12 +440,12 @@ bool LiveIntervals::shrinkToUses(LiveInterval *li,
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return CanSeparate;
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}
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void LiveIntervals::extendToIndices(LiveInterval *LI,
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void LiveIntervals::extendToIndices(LiveRange &LR,
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ArrayRef<SlotIndex> Indices) {
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assert(LRCalc && "LRCalc not initialized.");
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LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
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for (unsigned i = 0, e = Indices.size(); i != e; ++i)
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LRCalc->extend(LI, Indices[i]);
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LRCalc->extend(LR, Indices[i]);
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}
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void LiveIntervals::pruneValue(LiveInterval *LI, SlotIndex Kill,
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@ -36,11 +36,11 @@ void LiveRangeCalc::reset(const MachineFunction *mf,
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}
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void LiveRangeCalc::createDeadDefs(LiveInterval *LI, unsigned Reg) {
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void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
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assert(MRI && Indexes && "call reset() first");
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// Visit all def operands. If the same instruction has multiple defs of Reg,
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// LI->createDeadDef() will deduplicate.
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// LR.createDeadDef() will deduplicate.
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for (MachineRegisterInfo::def_iterator
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I = MRI->def_begin(Reg), E = MRI->def_end(); I != E; ++I) {
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const MachineInstr *MI = &*I;
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@ -54,13 +54,13 @@ void LiveRangeCalc::createDeadDefs(LiveInterval *LI, unsigned Reg) {
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Idx = Indexes->getInstructionIndex(MI)
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.getRegSlot(I.getOperand().isEarlyClobber());
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// Create the def in LI. This may find an existing def.
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LI->createDeadDef(Idx, *Alloc);
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// Create the def in LR. This may find an existing def.
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LR.createDeadDef(Idx, *Alloc);
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}
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}
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void LiveRangeCalc::extendToUses(LiveInterval *LI, unsigned Reg) {
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void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg) {
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assert(MRI && Indexes && "call reset() first");
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// Visit all operands that read Reg. This may include partial defs.
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@ -99,7 +99,7 @@ void LiveRangeCalc::extendToUses(LiveInterval *LI, unsigned Reg) {
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Idx = Idx.getRegSlot(true);
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}
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}
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extend(LI, Idx, Reg);
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extend(LR, Idx, Reg);
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}
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}
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@ -125,17 +125,14 @@ void LiveRangeCalc::updateLiveIns() {
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assert(Seen.test(MBB->getNumber()));
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LiveOut[MBB] = LiveOutPair(I->Value, (MachineDomTreeNode *)0);
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}
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Updater.setDest(I->LI);
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Updater.setDest(&I->LR);
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Updater.add(Start, End, I->Value);
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}
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LiveIn.clear();
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}
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void LiveRangeCalc::extend(LiveInterval *LI,
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SlotIndex Kill,
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unsigned PhysReg) {
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assert(LI && "Missing live range");
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void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg) {
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assert(Kill.isValid() && "Invalid SlotIndex");
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assert(Indexes && "Missing SlotIndexes");
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assert(DomTree && "Missing dominator tree");
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@ -144,14 +141,14 @@ void LiveRangeCalc::extend(LiveInterval *LI,
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assert(KillMBB && "No MBB at Kill");
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// Is there a def in the same MBB we can extend?
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if (LI->extendInBlock(Indexes->getMBBStartIdx(KillMBB), Kill))
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if (LR.extendInBlock(Indexes->getMBBStartIdx(KillMBB), Kill))
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return;
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// Find the single reaching def, or determine if Kill is jointly dominated by
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// multiple values, and we may need to create even more phi-defs to preserve
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// VNInfo SSA form. Perform a search for all predecessor blocks where we
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// know the dominating VNInfo.
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if (findReachingDefs(LI, KillMBB, Kill, PhysReg))
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if (findReachingDefs(LR, *KillMBB, Kill, PhysReg))
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return;
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// When there were multiple different values, we may need new PHIs.
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@ -170,13 +167,11 @@ void LiveRangeCalc::calculateValues() {
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}
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bool LiveRangeCalc::findReachingDefs(LiveInterval *LI,
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MachineBasicBlock *KillMBB,
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SlotIndex Kill,
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unsigned PhysReg) {
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unsigned KillMBBNum = KillMBB->getNumber();
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bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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SlotIndex Kill, unsigned PhysReg) {
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unsigned KillMBBNum = KillMBB.getNumber();
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// Block numbers where LI should be live-in.
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// Block numbers where LR should be live-in.
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SmallVector<unsigned, 16> WorkList(1, KillMBBNum);
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// Remember if we have seen more than one value.
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@ -203,7 +198,7 @@ bool LiveRangeCalc::findReachingDefs(LiveInterval *LI,
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#endif
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for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
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PE = MBB->pred_end(); PI != PE; ++PI) {
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PE = MBB->pred_end(); PI != PE; ++PI) {
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MachineBasicBlock *Pred = *PI;
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// Is this a known live-out block?
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@ -221,7 +216,7 @@ bool LiveRangeCalc::findReachingDefs(LiveInterval *LI,
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// First time we see Pred. Try to determine the live-out value, but set
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// it as null if Pred is live-through with an unknown value.
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VNInfo *VNI = LI->extendInBlock(Start, End);
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VNInfo *VNI = LR.extendInBlock(Start, End);
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setLiveOutValue(Pred, VNI);
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if (VNI) {
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if (TheVNI && TheVNI != VNI)
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@ -231,7 +226,7 @@ bool LiveRangeCalc::findReachingDefs(LiveInterval *LI,
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}
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// No, we need a live-in value for Pred as well
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if (Pred != KillMBB)
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if (Pred != &KillMBB)
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WorkList.push_back(Pred->getNumber());
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else
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// Loopback to KillMBB, so value is really live through.
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@ -248,9 +243,9 @@ bool LiveRangeCalc::findReachingDefs(LiveInterval *LI,
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// If a unique reaching def was found, blit in the live ranges immediately.
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if (UniqueVNI) {
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LiveRangeUpdater Updater(LI);
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for (SmallVectorImpl<unsigned>::const_iterator
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I = WorkList.begin(), E = WorkList.end(); I != E; ++I) {
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LiveRangeUpdater Updater(&LR);
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for (SmallVectorImpl<unsigned>::const_iterator I = WorkList.begin(),
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E = WorkList.end(); I != E; ++I) {
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SlotIndex Start, End;
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tie(Start, End) = Indexes->getMBBRange(*I);
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// Trim the live range in KillMBB.
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@ -270,8 +265,8 @@ bool LiveRangeCalc::findReachingDefs(LiveInterval *LI,
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for (SmallVectorImpl<unsigned>::const_iterator
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I = WorkList.begin(), E = WorkList.end(); I != E; ++I) {
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MachineBasicBlock *MBB = MF->getBlockNumbered(*I);
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addLiveInBlock(LI, DomTree->getNode(MBB));
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if (MBB == KillMBB)
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addLiveInBlock(LR, DomTree->getNode(MBB));
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if (MBB == &KillMBB)
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LiveIn.back().Kill = Kill;
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}
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@ -348,16 +343,17 @@ void LiveRangeCalc::updateSSA() {
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assert(Alloc && "Need VNInfo allocator to create PHI-defs");
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SlotIndex Start, End;
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tie(Start, End) = Indexes->getMBBRange(MBB);
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VNInfo *VNI = I->LI->getNextValue(Start, *Alloc);
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LiveRange &LR = I->LR;
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VNInfo *VNI = LR.getNextValue(Start, *Alloc);
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I->Value = VNI;
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// This block is done, we know the final value.
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I->DomNode = 0;
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// Add liveness since updateLiveIns now skips this node.
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if (I->Kill.isValid())
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I->LI->addSegment(LiveInterval::Segment(Start, I->Kill, VNI));
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LR.addSegment(LiveInterval::Segment(Start, I->Kill, VNI));
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else {
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I->LI->addSegment(LiveInterval::Segment(Start, End, VNI));
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LR.addSegment(LiveInterval::Segment(Start, End, VNI));
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LOP = LiveOutPair(VNI, Node);
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}
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} else if (IDomValue.first) {
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@ -75,9 +75,9 @@ class LiveRangeCalc {
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/// LiveInBlock - Information about a basic block where a live range is known
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/// to be live-in, but the value has not yet been determined.
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struct LiveInBlock {
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// LI - The live range that is live-in to this block. The algorithms can
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// The live range set that is live-in to this block. The algorithms can
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// handle multiple non-overlapping live ranges simultaneously.
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LiveInterval *LI;
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LiveRange &LR;
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// DomNode - Dominator tree node for the block.
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// Cleared when the final value has been determined and LI has been updated.
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@ -91,8 +91,8 @@ class LiveRangeCalc {
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// Live-in value filled in by updateSSA once it is known.
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VNInfo *Value;
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LiveInBlock(LiveInterval *li, MachineDomTreeNode *node, SlotIndex kill)
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: LI(li), DomNode(node), Kill(kill), Value(0) {}
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LiveInBlock(LiveRange &LR, MachineDomTreeNode *node, SlotIndex kill)
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: LR(LR), DomNode(node), Kill(kill), Value(0) {}
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};
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/// LiveIn - Work list of blocks where the live-in value has yet to be
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@ -111,10 +111,8 @@ class LiveRangeCalc {
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/// are added to the LiveIn array, and the function returns false.
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///
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/// PhysReg, when set, is used to verify live-in lists on basic blocks.
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bool findReachingDefs(LiveInterval *LI,
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MachineBasicBlock *KillMBB,
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SlotIndex Kill,
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unsigned PhysReg);
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bool findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
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SlotIndex Kill, unsigned PhysReg);
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/// updateSSA - Compute the values that will be live in to all requested
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/// blocks in LiveIn. Create PHI-def values as required to preserve SSA form.
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@ -161,27 +159,27 @@ public:
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/// single existing value, Alloc may be null.
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///
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/// PhysReg, when set, is used to verify live-in lists on basic blocks.
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void extend(LiveInterval *LI, SlotIndex Kill, unsigned PhysReg = 0);
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void extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg = 0);
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/// createDeadDefs - Create a dead def in LI for every def operand of Reg.
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/// Each instruction defining Reg gets a new VNInfo with a corresponding
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/// minimal live range.
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void createDeadDefs(LiveInterval *LI, unsigned Reg);
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void createDeadDefs(LiveRange &LR, unsigned Reg);
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/// createDeadDefs - Create a dead def in LI for every def of LI->reg.
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void createDeadDefs(LiveInterval *LI) {
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createDeadDefs(LI, LI->reg);
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void createDeadDefs(LiveInterval &LI) {
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createDeadDefs(LI, LI.reg);
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}
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/// extendToUses - Extend the live range of LI to reach all uses of Reg.
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///
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/// All uses must be jointly dominated by existing liveness. PHI-defs are
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/// inserted as needed to preserve SSA form.
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void extendToUses(LiveInterval *LI, unsigned Reg);
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void extendToUses(LiveRange &LR, unsigned Reg);
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/// extendToUses - Extend the live range of LI to reach all uses of LI->reg.
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void extendToUses(LiveInterval *LI) {
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extendToUses(LI, LI->reg);
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void extendToUses(LiveInterval &LI) {
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extendToUses(LI, LI.reg);
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}
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//===--------------------------------------------------------------------===//
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@ -217,10 +215,10 @@ public:
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/// @param Kill Index in block where LI is killed. If the value is
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/// live-through, set Kill = SLotIndex() and also call
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/// setLiveOutValue(MBB, 0).
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void addLiveInBlock(LiveInterval *LI,
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void addLiveInBlock(LiveRange &LR,
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MachineDomTreeNode *DomNode,
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SlotIndex Kill = SlotIndex()) {
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LiveIn.push_back(LiveInBlock(LI, DomNode, Kill));
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LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
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}
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/// calculateValues - Calculate the value that will be live-in to each block
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@ -2015,7 +2015,7 @@ bool RegisterCoalescer::joinVirtRegs(CoalescerPair &CP) {
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// CR_Replace conflicts.
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DEBUG(dbgs() << "\t\trestoring liveness to " << EndPoints.size()
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<< " points: " << LHS << '\n');
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LIS->extendToIndices(&LHS, EndPoints);
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LIS->extendToIndices(LHS, EndPoints);
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return true;
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}
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@ -862,13 +862,13 @@ bool SplitEditor::transferValues() {
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// The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
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DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
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LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
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LiveRange &LR = LIS.getInterval(Edit->get(RegIdx));
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// Check for a simply defined value that can be blitted directly.
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ValueForcePair VFP = Values.lookup(std::make_pair(RegIdx, ParentVNI->id));
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if (VNInfo *VNI = VFP.getPointer()) {
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DEBUG(dbgs() << ':' << VNI->id);
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LI->addSegment(LiveInterval::Segment(Start, End, VNI));
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LR.addSegment(LiveInterval::Segment(Start, End, VNI));
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Start = End;
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continue;
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}
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@ -892,7 +892,7 @@ bool SplitEditor::transferValues() {
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// The first block may be live-in, or it may have its own def.
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if (Start != BlockStart) {
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VNInfo *VNI = LI->extendInBlock(BlockStart, std::min(BlockEnd, End));
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VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End));
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assert(VNI && "Missing def for complex mapped value");
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DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
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// MBB has its own def. Is it also live-out?
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@ -912,7 +912,7 @@ bool SplitEditor::transferValues() {
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if (BlockStart == ParentVNI->def) {
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// This block has the def of a parent PHI, so it isn't live-in.
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assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
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VNInfo *VNI = LI->extendInBlock(BlockStart, std::min(BlockEnd, End));
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VNInfo *VNI = LR.extendInBlock(BlockStart, std::min(BlockEnd, End));
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assert(VNI && "Missing def for complex mapped parent PHI");
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if (End >= BlockEnd)
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LRC.setLiveOutValue(MBB, VNI); // Live-out as well.
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@ -920,10 +920,10 @@ bool SplitEditor::transferValues() {
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// This block needs a live-in value. The last block covered may not
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// be live-out.
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if (End < BlockEnd)
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LRC.addLiveInBlock(LI, MDT[MBB], End);
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LRC.addLiveInBlock(LR, MDT[MBB], End);
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else {
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// Live-through, and we don't know the value.
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LRC.addLiveInBlock(LI, MDT[MBB]);
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LRC.addLiveInBlock(LR, MDT[MBB]);
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LRC.setLiveOutValue(MBB, 0);
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}
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}
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@ -950,7 +950,7 @@ void SplitEditor::extendPHIKillRanges() {
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if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
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continue;
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unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
|
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LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
|
||||
LiveRange &LR = LIS.getInterval(Edit->get(RegIdx));
|
||||
LiveRangeCalc &LRC = getLRCalc(RegIdx);
|
||||
MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
|
||||
for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
|
||||
@ -962,7 +962,7 @@ void SplitEditor::extendPHIKillRanges() {
|
||||
if (Edit->getParent().liveAt(LastUse)) {
|
||||
assert(RegAssign.lookup(LastUse) == RegIdx &&
|
||||
"Different register assignment in phi predecessor");
|
||||
LRC.extend(LI, End);
|
||||
LRC.extend(LR, End);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -1012,7 +1012,7 @@ void SplitEditor::rewriteAssigned(bool ExtendRanges) {
|
||||
} else
|
||||
Idx = Idx.getRegSlot(true);
|
||||
|
||||
getLRCalc(RegIdx).extend(LI, Idx.getNextSlot());
|
||||
getLRCalc(RegIdx).extend(*LI, Idx.getNextSlot());
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user