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Remove CCAssignFnForRet from X86 FastISel in favour of RetCC_X86,
which has the same logic specified in the CallingConv TD file. This brings FastISel in line with the standard X86 ISel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117855 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -115,7 +115,6 @@ private:
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bool X86SelectCall(const Instruction *I);
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CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool isTailCall = false);
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CCAssignFn *CCAssignFnForRet(CallingConv::ID CC, bool isTailCall = false);
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const X86InstrInfo *getInstrInfo() const {
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return getTargetMachine()->getInstrInfo();
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@ -189,20 +188,6 @@ CCAssignFn *X86FastISel::CCAssignFnForCall(CallingConv::ID CC,
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return CC_X86_32_C;
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}
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/// CCAssignFnForRet - Selects the correct CCAssignFn for a given calling
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/// convention.
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CCAssignFn *X86FastISel::CCAssignFnForRet(CallingConv::ID CC,
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bool isTaillCall) {
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if (Subtarget->is64Bit()) {
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if (Subtarget->isTargetWin64())
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return RetCC_X86_Win64_C;
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else
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return RetCC_X86_64_C;
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}
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return RetCC_X86_32_C;
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}
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/// X86FastEmitLoad - Emit a machine instruction to load a value of type VT.
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/// The address is either pre-computed, i.e. Ptr, or a GlobalAddress, i.e. GV.
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/// Return true and the result register by reference if it is possible.
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@ -731,7 +716,7 @@ bool X86FastISel::X86SelectRet(const Instruction *I) {
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// Analyze operands of the call, assigning locations to each operand.
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SmallVector<CCValAssign, 16> ValLocs;
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CCState CCInfo(CC, F.isVarArg(), TM, ValLocs, I->getContext());
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CCInfo.AnalyzeReturn(Outs, CCAssignFnForRet(CC));
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CCInfo.AnalyzeReturn(Outs, RetCC_X86);
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const Value *RV = Ret->getOperand(0);
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unsigned Reg = getRegForValue(RV);
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