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Add AVX SSE2 mask creation and conditional store instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107306 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2839,29 +2839,55 @@ let Constraints = "$src1 = $dst" in
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} // ExeDomain = SSEPackedInt
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//===---------------------------------------------------------------------===//
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// SSE2 - Packed Misc Integer Instructions
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// SSE2 - Packed Mask Creation
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//===---------------------------------------------------------------------===//
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let ExeDomain = SSEPackedInt in {
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// Mask creation
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let isAsmParserOnly = 1 in
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def VPMOVMSKBrr : VPDI<0xD7, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src),
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"pmovmskb\t{$src, $dst|$dst, $src}",
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[(set GR32:$dst, (int_x86_sse2_pmovmskb_128 VR128:$src))]>, VEX;
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def PMOVMSKBrr : PDI<0xD7, MRMSrcReg, (outs GR32:$dst), (ins VR128:$src),
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"pmovmskb\t{$src, $dst|$dst, $src}",
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[(set GR32:$dst, (int_x86_sse2_pmovmskb_128 VR128:$src))]>;
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// Conditional store
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let Uses = [EDI] in
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def MASKMOVDQU : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
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"maskmovdqu\t{$mask, $src|$src, $mask}",
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[(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>;
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let Uses = [RDI] in
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def MASKMOVDQU64 : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
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"maskmovdqu\t{$mask, $src|$src, $mask}",
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[(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, RDI)]>;
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"pmovmskb\t{$src, $dst|$dst, $src}",
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[(set GR32:$dst, (int_x86_sse2_pmovmskb_128 VR128:$src))]>;
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} // ExeDomain = SSEPackedInt
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//===---------------------------------------------------------------------===//
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// SSE2 - Conditional Store
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//===---------------------------------------------------------------------===//
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let ExeDomain = SSEPackedInt in {
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let isAsmParserOnly = 1 in {
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let Uses = [EDI] in
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def VMASKMOVDQU : VPDI<0xF7, MRMSrcReg, (outs),
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(ins VR128:$src, VR128:$mask),
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"maskmovdqu\t{$mask, $src|$src, $mask}",
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[(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>, VEX;
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let Uses = [RDI] in
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def VMASKMOVDQU64 : VPDI<0xF7, MRMSrcReg, (outs),
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(ins VR128:$src, VR128:$mask),
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"maskmovdqu\t{$mask, $src|$src, $mask}",
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[(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, RDI)]>, VEX;
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}
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let Uses = [EDI] in
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def MASKMOVDQU : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
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"maskmovdqu\t{$mask, $src|$src, $mask}",
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[(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>;
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let Uses = [RDI] in
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def MASKMOVDQU64 : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
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"maskmovdqu\t{$mask, $src|$src, $mask}",
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[(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, RDI)]>;
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} // ExeDomain = SSEPackedInt
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//===---------------------------------------------------------------------===//
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// SSE2 - Packed Misc Integer Instructions
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//===---------------------------------------------------------------------===//
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// Flush cache
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def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
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"clflush\t$src", [(int_x86_sse2_clflush addr:$src)]>,
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@ -11494,3 +11494,11 @@
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// CHECK: encoding: [0xc5,0xf9,0xc5,0xc2,0x07]
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vpextrw $7, %xmm2, %eax
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// CHECK: vpmovmskb %xmm1, %eax
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// CHECK: encoding: [0xc5,0xf9,0xd7,0xc1]
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vpmovmskb %xmm1, %eax
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// CHECK: vmaskmovdqu %xmm1, %xmm2
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// CHECK: encoding: [0xc5,0xf9,0xf7,0xd1]
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vmaskmovdqu %xmm1, %xmm2
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@ -1534,3 +1534,11 @@ pshufb CPI1_0(%rip), %xmm1
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// CHECK: encoding: [0xc4,0xc1,0x79,0xc5,0xc4,0x07]
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vpextrw $7, %xmm12, %eax
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// CHECK: vpmovmskb %xmm12, %eax
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// CHECK: encoding: [0xc4,0xc1,0x79,0xd7,0xc4]
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vpmovmskb %xmm12, %eax
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// CHECK: vmaskmovdqu %xmm14, %xmm15
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// CHECK: encoding: [0xc4,0x41,0x79,0xf7,0xfe]
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vmaskmovdqu %xmm14, %xmm15
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