6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-24 22:32:47 +00:00
Code Issues Projects Releases Wiki Activity

Revert 96854, 96852, and 96849, unbreaking test/CodeGen/CellSPU/i64ops.ll.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96871 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2010-02-23 02:33:29 +00:00
parent 8f2b4cc071
commit e2c0924f8e
1 changed files with 42 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

97
lib/Target/CellSPU/SPUISelDAGToDAG.cpp
View File

@ -294,12 +294,8 @@ namespace {
((vecVT == MVT::v2i64) && ((vecVT == MVT::v2i64) &&
((SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) || ((SPU::get_vec_i16imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) ||
(SPU::get_ILHUvec_imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) || (SPU::get_ILHUvec_imm(bvNode, *CurDAG, MVT::i64).getNode() != 0) ||
(SPU::get_vec_u18imm(bvNode, *CurDAG, MVT::i64).getNode() != 0)))) { (SPU::get_vec_u18imm(bvNode, *CurDAG, MVT::i64).getNode() != 0))))
HandleSDNode Dummy(SDValue(bvNode, 0)); return Select(bvNode);
if (SDNode *N = Select(bvNode))
return N;
return Dummy.getValue().getNode();
}
// No, need to emit a constant pool spill: // No, need to emit a constant pool spill:
std::vector<Constant*> CV; std::vector<Constant*> CV;
@ -315,15 +311,10 @@ namespace {
SDValue CGPoolOffset = SDValue CGPoolOffset =
SPU::LowerConstantPool(CPIdx, *CurDAG, SPU::LowerConstantPool(CPIdx, *CurDAG,
SPUtli.getSPUTargetMachine()); SPUtli.getSPUTargetMachine());
return SelectCode(CurDAG->getLoad(vecVT, dl,
HandleSDNode Dummy(CurDAG->getLoad(vecVT, dl,
CurDAG->getEntryNode(), CGPoolOffset, CurDAG->getEntryNode(), CGPoolOffset,
PseudoSourceValue::getConstantPool(), 0, PseudoSourceValue::getConstantPool(), 0,
false, false, Alignment)); false, false, Alignment).getNode());
CurDAG->ReplaceAllUsesWith(SDValue(bvNode, 0), Dummy.getValue());
if (SDNode *N = SelectCode(Dummy.getValue().getNode()))
return N;
return Dummy.getValue().getNode();
} }
/// Select - Convert the specified operand from a target-independent to a /// Select - Convert the specified operand from a target-independent to a
@ -701,8 +692,9 @@ SPUDAGToDAGISel::Select(SDNode *N) {
SDValue Ops[8]; SDValue Ops[8];
DebugLoc dl = N->getDebugLoc(); DebugLoc dl = N->getDebugLoc();
if (N->isMachineOpcode()) if (N->isMachineOpcode()) {
return NULL; // Already selected. return NULL; // Already selected.
}
if (Opc == ISD::FrameIndex) { if (Opc == ISD::FrameIndex) {
int FI = cast<FrameIndexSDNode>(N)->getIndex(); int FI = cast<FrameIndexSDNode>(N)->getIndex();
@ -767,65 +759,43 @@ SPUDAGToDAGISel::Select(SDNode *N) {
} }
SDNode *shufMaskLoad = emitBuildVector(shufMask.getNode()); SDNode *shufMaskLoad = emitBuildVector(shufMask.getNode());
SDNode *PromoteScalar =
HandleSDNode PromoteScalar(CurDAG->getNode(SPUISD::PREFSLOT2VEC, dl, SelectCode(CurDAG->getNode(SPUISD::PREFSLOT2VEC, dl,
Op0VecVT, Op0)); Op0VecVT, Op0).getNode());
SDValue PromScalar;
if (SDNode *N = SelectCode(PromoteScalar.getValue().getNode()))
PromScalar = SDValue(N, 0);
else
PromScalar = PromoteScalar.getValue();
SDValue zextShuffle = SDValue zextShuffle =
CurDAG->getNode(SPUISD::SHUFB, dl, OpVecVT, CurDAG->getNode(SPUISD::SHUFB, dl, OpVecVT,
PromScalar, PromScalar, SDValue(PromoteScalar, 0),
SDValue(PromoteScalar, 0),
SDValue(shufMaskLoad, 0)); SDValue(shufMaskLoad, 0));
HandleSDNode Dummy2(zextShuffle); // N.B.: BIT_CONVERT replaces and updates the zextShuffle node, so we
if (SDNode *N = SelectCode(Dummy2.getValue().getNode())) // re-use it in the VEC2PREFSLOT selection without needing to explicitly
return N; // call SelectCode (it's already done for us.)
HandleSDNode Dummy(CurDAG->getNode(SPUISD::VEC2PREFSLOT, dl, OpVT, SelectCode(CurDAG->getNode(ISD::BIT_CONVERT, dl, OpVecVT, zextShuffle).getNode());
Dummy2.getValue())); return SelectCode(CurDAG->getNode(SPUISD::VEC2PREFSLOT, dl, OpVT,
zextShuffle).getNode());
CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode());
SelectCode(Dummy.getValue().getNode());
return Dummy.getValue().getNode();
} else if (Opc == ISD::ADD && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) { } else if (Opc == ISD::ADD && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) {
SDNode *CGLoad = SDNode *CGLoad =
emitBuildVector(getCarryGenerateShufMask(*CurDAG, dl).getNode()); emitBuildVector(getCarryGenerateShufMask(*CurDAG, dl).getNode());
HandleSDNode Dummy(CurDAG->getNode(SPUISD::ADD64_MARKER, dl, OpVT, return SelectCode(CurDAG->getNode(SPUISD::ADD64_MARKER, dl, OpVT,
N->getOperand(0), N->getOperand(1), N->getOperand(0), N->getOperand(1),
SDValue(CGLoad, 0))); SDValue(CGLoad, 0)).getNode());
CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode());
if (SDNode *N = SelectCode(Dummy.getValue().getNode()))
return N;
return Dummy.getValue().getNode();
} else if (Opc == ISD::SUB && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) { } else if (Opc == ISD::SUB && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) {
SDNode *CGLoad = SDNode *CGLoad =
emitBuildVector(getBorrowGenerateShufMask(*CurDAG, dl).getNode()); emitBuildVector(getBorrowGenerateShufMask(*CurDAG, dl).getNode());
HandleSDNode Dummy(CurDAG->getNode(SPUISD::SUB64_MARKER, dl, OpVT, return SelectCode(CurDAG->getNode(SPUISD::SUB64_MARKER, dl, OpVT,
N->getOperand(0), N->getOperand(1), N->getOperand(0), N->getOperand(1),
SDValue(CGLoad, 0))); SDValue(CGLoad, 0)).getNode());
CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode());
if (SDNode *N = SelectCode(Dummy.getValue().getNode()))
return N;
return Dummy.getValue().getNode();
} else if (Opc == ISD::MUL && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) { } else if (Opc == ISD::MUL && (OpVT == MVT::i64 || OpVT == MVT::v2i64)) {
SDNode *CGLoad = SDNode *CGLoad =
emitBuildVector(getCarryGenerateShufMask(*CurDAG, dl).getNode()); emitBuildVector(getCarryGenerateShufMask(*CurDAG, dl).getNode());
HandleSDNode Dummy(CurDAG->getNode(SPUISD::MUL64_MARKER, dl, OpVT, return SelectCode(CurDAG->getNode(SPUISD::MUL64_MARKER, dl, OpVT,
N->getOperand(0), N->getOperand(1), N->getOperand(0), N->getOperand(1),
SDValue(CGLoad, 0))); SDValue(CGLoad, 0)).getNode());
CurDAG->ReplaceAllUsesWith(N, Dummy.getValue().getNode());
if (SDNode *N = SelectCode(Dummy.getValue().getNode()))
return N;
return Dummy.getValue().getNode();
} else if (Opc == ISD::TRUNCATE) { } else if (Opc == ISD::TRUNCATE) {
SDValue Op0 = N->getOperand(0); SDValue Op0 = N->getOperand(0);
if ((Op0.getOpcode() == ISD::SRA || Op0.getOpcode() == ISD::SRL) if ((Op0.getOpcode() == ISD::SRA || Op0.getOpcode() == ISD::SRL)
@ -862,14 +832,17 @@ SPUDAGToDAGISel::Select(SDNode *N) {
} }
} }
} else if (Opc == ISD::SHL) { } else if (Opc == ISD::SHL) {
if (OpVT == MVT::i64) if (OpVT == MVT::i64) {
return SelectSHLi64(N, OpVT); return SelectSHLi64(N, OpVT);
}
} else if (Opc == ISD::SRL) { } else if (Opc == ISD::SRL) {
if (OpVT == MVT::i64) if (OpVT == MVT::i64) {
return SelectSRLi64(N, OpVT); return SelectSRLi64(N, OpVT);
}
} else if (Opc == ISD::SRA) { } else if (Opc == ISD::SRA) {
if (OpVT == MVT::i64) if (OpVT == MVT::i64) {
return SelectSRAi64(N, OpVT); return SelectSRAi64(N, OpVT);
}
} else if (Opc == ISD::FNEG } else if (Opc == ISD::FNEG
&& (OpVT == MVT::f64 || OpVT == MVT::v2f64)) { && (OpVT == MVT::f64 || OpVT == MVT::v2f64)) {
DebugLoc dl = N->getDebugLoc(); DebugLoc dl = N->getDebugLoc();
@ -1251,15 +1224,13 @@ SDNode *SPUDAGToDAGISel::SelectI64Constant(uint64_t Value64, EVT OpVT,
? shufmask.getNode() ? shufmask.getNode()
: emitBuildVector(shufmask.getNode())); : emitBuildVector(shufmask.getNode()));
SDValue shufNode = SDNode *shufNode =
CurDAG->getNode(SPUISD::SHUFB, dl, OpVecVT, Select(CurDAG->getNode(SPUISD::SHUFB, dl, OpVecVT,
SDValue(lhsNode, 0), SDValue(rhsNode, 0), SDValue(lhsNode, 0), SDValue(rhsNode, 0),
SDValue(shufMaskNode, 0)); SDValue(shufMaskNode, 0)).getNode());
HandleSDNode Dummy(shufNode);
SDNode *SN = SelectCode(Dummy.getValue().getNode());
if (SN == 0) SN = Dummy.getValue().getNode();
return CurDAG->getMachineNode(SPU::ORi64_v2i64, dl, OpVT, SDValue(SN, 0)); return CurDAG->getMachineNode(SPU::ORi64_v2i64, dl, OpVT,
SDValue(shufNode, 0));
} else if (i64vec.getOpcode() == ISD::BUILD_VECTOR) { } else if (i64vec.getOpcode() == ISD::BUILD_VECTOR) {
return CurDAG->getMachineNode(SPU::ORi64_v2i64, dl, OpVT, return CurDAG->getMachineNode(SPU::ORi64_v2i64, dl, OpVT,
SDValue(emitBuildVector(i64vec.getNode()), 0)); SDValue(emitBuildVector(i64vec.getNode()), 0));