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Fixups for Thumb2 vldr's need to have the effective PC aligned as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121587 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -207,12 +207,12 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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// Offset by 4 and don't encode the lower bit, which is always 0.
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return ((Value - 4) >> 1) & 0xff;
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case ARM::fixup_arm_pcrel_10:
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Value = Value - 6; // ARM fixups offset by an additional word and don't
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Value = Value - 4; // ARM fixups offset by an additional word and don't
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// need to adjust for the half-word ordering.
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// Fall through.
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case ARM::fixup_t2_pcrel_10: {
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// Offset by 4, adjusted by two due to the half-word ordering of thumb.
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Value = Value - 2;
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Value = Value - 4;
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bool isAdd = true;
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if ((int64_t)Value < 0) {
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Value = -Value;
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