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Add TCR register access

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214826 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joerg Sonnenberger 2014-08-04 23:53:42 +00:00
parent 7c5b978254
commit e2f9c8d663
2 changed files with 10 additions and 0 deletions
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3
lib/Target/PowerPC/PPCInstrInfo.td
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@ -3279,6 +3279,9 @@ def : InstAlias<"mfdear $Rx", (MFSPR gprc:$Rx, 981)>, Requires<[IsPPC4xx]>;
def : InstAlias<"mtesr $Rx", (MTSPR 980, gprc:$Rx)>, Requires<[IsPPC4xx]>;
def : InstAlias<"mfesr $Rx", (MFSPR gprc:$Rx, 980)>, Requires<[IsPPC4xx]>;
def : InstAlias<"mttcr $Rx", (MTSPR 986, gprc:$Rx)>, Requires<[IsPPC4xx]>;
def : InstAlias<"mftcr $Rx", (MFSPR gprc:$Rx, 986)>, Requires<[IsPPC4xx]>;
def LAx : PPCAsmPseudo<"la $rA, $addr", (ins gprc:$rA, memri:$addr)>;
def SUBI : PPCAsmPseudo<"subi $rA, $rB, $imm",

7
test/MC/PowerPC/ppc64-encoding-4xx.s
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@ -70,3 +70,10 @@
# CHECK-BE: mtspr 980, 2 # encoding: [0x7c,0x54,0xf3,0xa6]
# CHECK-LE: mtspr 980, 2 # encoding: [0xa6,0xf3,0x54,0x7c]
mtesr %r2
# CHECK-BE: mfspr 2, 986 # encoding: [0x7c,0x5a,0xf2,0xa6]
# CHECK-LE: mfspr 2, 986 # encoding: [0xa6,0xf2,0x5a,0x7c]
mftcr %r2
# CHECK-BE: mtspr 986, 2 # encoding: [0x7c,0x5a,0xf3,0xa6]
# CHECK-LE: mtspr 986, 2 # encoding: [0xa6,0xf3,0x5a,0x7c]
mttcr %r2