From e32bbf61c0897ee00518392d0ab74c7fcd8ca01a Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 28 Feb 2007 07:09:55 +0000 Subject: [PATCH] use high-level functions in CCState git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34739 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 87625a19682..548f34aaa9d 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -438,15 +438,8 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) { SmallVector RVLocs; unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); CCState CCInfo(CC, getTargetMachine(), RVLocs); + CCInfo.AnalyzeReturn(Op.Val, RetCC_X86); - // Determine which register each value should be copied into. - for (unsigned i = 0; i != Op.getNumOperands() / 2; ++i) { - MVT::ValueType VT = Op.getOperand(i*2+1).getValueType(); - if (RetCC_X86(i, VT, VT, CCValAssign::Full, - cast(Op.getOperand(i*2+2))->getValue(), - CCInfo)) - assert(0 && "Unhandled result type!"); - } // If this is the first return lowered for this function, add the regs to the // liveout set for the function. @@ -521,16 +514,14 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) { SDNode *X86TargetLowering:: LowerCallResult(SDOperand Chain, SDOperand InFlag, SDNode *TheCall, unsigned CallingConv, SelectionDAG &DAG) { - SmallVector ResultVals; - + + // Assign locations to each value returned by this call. SmallVector RVLocs; CCState CCInfo(CallingConv, getTargetMachine(), RVLocs); + CCInfo.AnalyzeCallResult(TheCall, RetCC_X86); + - for (unsigned i = 0, e = TheCall->getNumValues() - 1; i != e; ++i) { - MVT::ValueType VT = TheCall->getValueType(i); - if (RetCC_X86(i, VT, VT, CCValAssign::Full, 0, CCInfo)) - assert(0 && "Unhandled result type!"); - } + SmallVector ResultVals; // Copy all of the result registers out of their specified physreg. if (RVLocs.size() != 1 || RVLocs[0].getLocReg() != X86::ST0) {