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https://github.com/c64scene-ar/llvm-6502.git
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Add basic generic CodeGen support for half.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146927 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -45,49 +45,50 @@ namespace llvm {
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FIRST_INTEGER_VALUETYPE = i1,
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LAST_INTEGER_VALUETYPE = i128,
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f32 = 7, // This is a 32 bit floating point value
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f64 = 8, // This is a 64 bit floating point value
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f80 = 9, // This is a 80 bit floating point value
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f128 = 10, // This is a 128 bit floating point value
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ppcf128 = 11, // This is a PPC 128-bit floating point value
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f16 = 7, // This is a 16 bit floating point value
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f32 = 8, // This is a 32 bit floating point value
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f64 = 9, // This is a 64 bit floating point value
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f80 = 10, // This is a 80 bit floating point value
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f128 = 11, // This is a 128 bit floating point value
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ppcf128 = 12, // This is a PPC 128-bit floating point value
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v2i8 = 12, // 2 x i8
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v4i8 = 13, // 4 x i8
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v8i8 = 14, // 8 x i8
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v16i8 = 15, // 16 x i8
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v32i8 = 16, // 32 x i8
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v2i16 = 17, // 2 x i16
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v4i16 = 18, // 4 x i16
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v8i16 = 19, // 8 x i16
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v16i16 = 20, // 16 x i16
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v2i32 = 21, // 2 x i32
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v4i32 = 22, // 4 x i32
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v8i32 = 23, // 8 x i32
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v1i64 = 24, // 1 x i64
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v2i64 = 25, // 2 x i64
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v4i64 = 26, // 4 x i64
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v8i64 = 27, // 8 x i64
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v2i8 = 13, // 2 x i8
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v4i8 = 14, // 4 x i8
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v8i8 = 15, // 8 x i8
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v16i8 = 16, // 16 x i8
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v32i8 = 17, // 32 x i8
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v2i16 = 18, // 2 x i16
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v4i16 = 19, // 4 x i16
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v8i16 = 20, // 8 x i16
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v16i16 = 21, // 16 x i16
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v2i32 = 22, // 2 x i32
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v4i32 = 23, // 4 x i32
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v8i32 = 24, // 8 x i32
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v1i64 = 25, // 1 x i64
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v2i64 = 26, // 2 x i64
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v4i64 = 27, // 4 x i64
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v8i64 = 28, // 8 x i64
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v2f32 = 28, // 2 x f32
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v4f32 = 29, // 4 x f32
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v8f32 = 30, // 8 x f32
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v2f64 = 31, // 2 x f64
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v4f64 = 32, // 4 x f64
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v2f32 = 29, // 2 x f32
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v4f32 = 30, // 4 x f32
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v8f32 = 31, // 8 x f32
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v2f64 = 32, // 2 x f64
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v4f64 = 33, // 4 x f64
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FIRST_VECTOR_VALUETYPE = v2i8,
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LAST_VECTOR_VALUETYPE = v4f64,
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x86mmx = 33, // This is an X86 MMX value
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x86mmx = 34, // This is an X86 MMX value
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Glue = 34, // This glues nodes together during pre-RA sched
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Glue = 35, // This glues nodes together during pre-RA sched
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isVoid = 35, // This has no value
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isVoid = 36, // This has no value
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Untyped = 36, // This value takes a register, but has
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Untyped = 37, // This value takes a register, but has
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// unspecified type. The register class
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// will be determined by the opcode.
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LAST_VALUETYPE = 37, // This always remains at the end of the list.
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LAST_VALUETYPE = 38, // This always remains at the end of the list.
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// This is the current maximum for LAST_VALUETYPE.
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// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
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@@ -143,7 +144,7 @@ namespace llvm {
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/// isFloatingPoint - Return true if this is a FP, or a vector FP type.
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bool isFloatingPoint() const {
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return ((SimpleTy >= MVT::f32 && SimpleTy <= MVT::ppcf128) ||
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return ((SimpleTy >= MVT::f16 && SimpleTy <= MVT::ppcf128) ||
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(SimpleTy >= MVT::v2f32 && SimpleTy <= MVT::v4f64));
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}
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@@ -252,6 +253,7 @@ namespace llvm {
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case i1 : return 1;
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case i8 : return 8;
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case i16 :
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case f16:
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case v2i8: return 16;
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case f32 :
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case i32 :
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@@ -301,6 +303,8 @@ namespace llvm {
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switch (BitWidth) {
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default:
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assert(false && "Bad bit width!");
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case 16:
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return MVT::f16;
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case 32:
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return MVT::f32;
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case 64:
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