Replace TargetInstrInfo::isInvariantLoad and its target-specific

implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83475 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-10-07 17:38:06 +00:00
parent 2dbc4c84f6
commit e33f44cfc5
12 changed files with 56 additions and 107 deletions

View File

@@ -116,30 +116,6 @@ XCoreInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
return 0;
}
/// isInvariantLoad - Return true if the specified instruction (which is marked
/// mayLoad) is loading from a location whose value is invariant across the
/// function. For example, loading a value from the constant pool or from
/// from the argument area of a function if it does not change. This should
/// only return true of *all* loads the instruction does are invariant (if it
/// does multiple loads).
bool
XCoreInstrInfo::isInvariantLoad(const MachineInstr *MI) const {
// Loads from constants pools and loads from invariant argument slots are
// invariant
int Opcode = MI->getOpcode();
if (Opcode == XCore::LDWCP_ru6 || Opcode == XCore::LDWCP_lru6) {
return MI->getOperand(1).isCPI();
}
int FrameIndex;
if (isLoadFromStackSlot(MI, FrameIndex)) {
const MachineFrameInfo &MFI =
*MI->getParent()->getParent()->getFrameInfo();
return MFI.isFixedObjectIndex(FrameIndex) &&
MFI.isImmutableObjectIndex(FrameIndex);
}
return false;
}
//===----------------------------------------------------------------------===//
// Branch Analysis
//===----------------------------------------------------------------------===//

View File

@@ -52,8 +52,6 @@ public:
virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
int &FrameIndex) const;
virtual bool isInvariantLoad(const MachineInstr *MI) const;
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond,