From e3620da26925268e3691a1cd8b7107215c014428 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 19 Mar 2014 22:19:54 +0000 Subject: [PATCH] R600/SI: Add support for 64-bit LDS writes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204274 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIInstructions.td | 5 ++- test/CodeGen/R600/local-64.ll | 75 +++++++++++++++++++++++++++++++ 2 files changed, 79 insertions(+), 1 deletion(-) diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index b4fb7c413f1..bbc72bf093a 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -408,6 +408,8 @@ def DS_SUB_U32_RTN : DS_1A1D_RET <0x21, "DS_SUB_U32_RTN", VReg_32>; def DS_WRITE_B32 : DS_Store_Helper <0x0000000d, "DS_WRITE_B32", VReg_32>; def DS_WRITE_B8 : DS_Store_Helper <0x00000001e, "DS_WRITE_B8", VReg_32>; def DS_WRITE_B16 : DS_Store_Helper <0x00000001f, "DS_WRITE_B16", VReg_32>; +def DS_WRITE_B64 : DS_Store_Helper <0x00000004d, "DS_WRITE_B64", VReg_64>; + def DS_READ_B32 : DS_Load_Helper <0x00000036, "DS_READ_B32", VReg_32>; def DS_READ_I8 : DS_Load_Helper <0x00000039, "DS_READ_I8", VReg_32>; def DS_READ_U8 : DS_Load_Helper <0x0000003a, "DS_READ_U8", VReg_32>; @@ -1942,7 +1944,7 @@ multiclass DSWritePat { >; def : Pat < - (frag i32:$src1, i32:$src0), + (frag vt:$src1, i32:$src0), (inst 0, $src0, $src1, 0) >; } @@ -1950,6 +1952,7 @@ multiclass DSWritePat { defm : DSWritePat ; defm : DSWritePat ; defm : DSWritePat ; +defm : DSWritePat ; def : Pat <(atomic_load_add_local i32:$ptr, i32:$val), (DS_ADD_U32_RTN 0, $ptr, $val, 0)>; diff --git a/test/CodeGen/R600/local-64.ll b/test/CodeGen/R600/local-64.ll index d31b88710dc..87f18aeca8f 100644 --- a/test/CodeGen/R600/local-64.ll +++ b/test/CodeGen/R600/local-64.ll @@ -81,3 +81,78 @@ define void @local_f64_load_0_offset(double addrspace(1)* %out, double addrspace store double %val, double addrspace(1)* %out, align 8 ret void } + +; SI-LABEL: @local_i64_store +; SI-NOT: ADD +; SI: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 56 [M0] +define void @local_i64_store(i64 addrspace(3)* %out) nounwind { + %gep = getelementptr i64 addrspace(3)* %out, i32 7 + store i64 5678, i64 addrspace(3)* %gep, align 8 + ret void +} + +; SI-LABEL: @local_i64_store_0_offset +; SI-NOT: ADD +; SI: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 0 [M0] +define void @local_i64_store_0_offset(i64 addrspace(3)* %out) nounwind { + store i64 1234, i64 addrspace(3)* %out, align 8 + ret void +} + +; SI-LABEL: @local_f64_store +; SI-NOT: ADD +; SI: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 56 [M0] +define void @local_f64_store(double addrspace(3)* %out) nounwind { + %gep = getelementptr double addrspace(3)* %out, i32 7 + store double 16.0, double addrspace(3)* %gep, align 8 + ret void +} + +; SI-LABEL: @local_f64_store_0_offset +; SI: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 0 [M0] +define void @local_f64_store_0_offset(double addrspace(3)* %out) nounwind { + store double 20.0, double addrspace(3)* %out, align 8 + ret void +} + +; SI-LABEL: @local_v2i64_store +; SI-NOT: ADD +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 120 [M0] +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 112 [M0] +define void @local_v2i64_store(<2 x i64> addrspace(3)* %out) nounwind { + %gep = getelementptr <2 x i64> addrspace(3)* %out, i32 7 + store <2 x i64> , <2 x i64> addrspace(3)* %gep, align 16 + ret void +} + +; SI-LABEL: @local_v2i64_store_0_offset +; SI-NOT: ADD +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 8 [M0] +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 0 [M0] +define void @local_v2i64_store_0_offset(<2 x i64> addrspace(3)* %out) nounwind { + store <2 x i64> , <2 x i64> addrspace(3)* %out, align 16 + ret void +} + +; SI-LABEL: @local_v4i64_store +; SI-NOT: ADD +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 248 [M0] +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 240 [M0] +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 232 [M0] +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 224 [M0] +define void @local_v4i64_store(<4 x i64> addrspace(3)* %out) nounwind { + %gep = getelementptr <4 x i64> addrspace(3)* %out, i32 7 + store <4 x i64> , <4 x i64> addrspace(3)* %gep, align 16 + ret void +} + +; SI-LABEL: @local_v4i64_store_0_offset +; SI-NOT: ADD +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 24 [M0] +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 16 [M0] +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 8 [M0] +; SI-DAG: DS_WRITE_B64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, 0 [M0] +define void @local_v4i64_store_0_offset(<4 x i64> addrspace(3)* %out) nounwind { + store <4 x i64> , <4 x i64> addrspace(3)* %out, align 16 + ret void +}