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Ensure that dump calls that are associated with asserts are removed from

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non-debug build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey 2006-07-11 17:58:07 +00:00
parent e2a78f2e3d
commit e37fe9b3a1
7 changed files with 23 additions and 12 deletions
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5
lib/Analysis/IPA/Andersens.cpp
View File

@ -260,9 +260,8 @@ namespace {
std::map<Value*, unsigned>::iterator I = ValueNodes.find(V);
if (I == ValueNodes.end()) {
V->dump();
assert(I != ValueNodes.end() &&
"Value does not have a node in the points-to graph!");
DEBUG(V->dump());
assert(0 && "Value does not have a node in the points-to graph!");
}
return &GraphNodes[I->second];
}

14
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -540,7 +540,9 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
return Result.getValue(Op.ResNo);
}
// Otherwise this is an unhandled builtin node. splat.
#ifndef NDEBUG
std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
#endif
assert(0 && "Do not know how to legalize this operator!");
abort();
case ISD::GlobalAddress:
@ -2865,7 +2867,9 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
case ISD::CopyFromReg:
assert(0 && "CopyFromReg must be legal!");
default:
#ifndef NDEBUG
std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
#endif
assert(0 && "Do not know how to promote this operator!");
abort();
case ISD::UNDEF:
@ -4205,7 +4209,9 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
case ISD::CopyFromReg:
assert(0 && "CopyFromReg must be legal!");
default:
#ifndef NDEBUG
std::cerr << "NODE: "; Node->dump(); std::cerr << "\n";
#endif
assert(0 && "Do not know how to expand this operator!");
abort();
case ISD::UNDEF:
@ -4703,7 +4709,11 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
}
switch (Node->getOpcode()) {
default: Node->dump(); assert(0 && "Unhandled operation in SplitVectorOp!");
default:
#ifndef NDEBUG
Node->dump();
#endif
assert(0 && "Unhandled operation in SplitVectorOp!");
case ISD::VBUILD_VECTOR: {
std::vector<SDOperand> LoOps(Node->op_begin(), Node->op_begin()+NewNumElts);
LoOps.push_back(NewNumEltsNode);
@ -4820,7 +4830,9 @@ SDOperand SelectionDAGLegalize::PackVectorOp(SDOperand Op,
SDOperand Result;
switch (Node->getOpcode()) {
default:
#ifndef NDEBUG
Node->dump(); std::cerr << "\n";
#endif
assert(0 && "Unknown vector operation in PackVectorOp!");
case ISD::VADD:
case ISD::VSUB:

2
lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
View File

@ -421,7 +421,7 @@ void ScheduleDAG::EmitNode(SDNode *Node,
} else {
switch (Node->getOpcode()) {
default:
Node->dump();
DEBUG(Node->dump());
assert(0 && "This target-independent node should have been selected!");
case ISD::EntryToken: // fall thru
case ISD::TokenFactor:

2
lib/Target/Alpha/AlphaISelDAGToDAG.cpp
View File

@ -303,7 +303,7 @@ void AlphaDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
bool rev = false;
bool isNE = false;
switch(CC) {
default: N->dump(); assert(0 && "Unknown FP comparison!");
default: DEBUG(N->dump()); assert(0 && "Unknown FP comparison!");
case ISD::SETEQ: case ISD::SETOEQ: case ISD::SETUEQ: Opc = Alpha::CMPTEQ; break;
case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT: Opc = Alpha::CMPTLT; break;
case ISD::SETLE: case ISD::SETOLE: case ISD::SETULE: Opc = Alpha::CMPTLE; break;

2
lib/Target/IA64/IA64ISelDAGToDAG.cpp
View File

@ -511,7 +511,7 @@ void IA64DAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
N->getValueType(0) : cast<VTSDNode>(N->getOperand(3))->getVT();
unsigned Opc;
switch (TypeBeingLoaded) {
default: N->dump(); assert(0 && "Cannot load this type!");
default: DEBUG(N->dump()); assert(0 && "Cannot load this type!");
case MVT::i1: { // this is a bool
Opc = IA64::LD1; // first we load a byte, then compare for != 0
if(N->getValueType(0) == MVT::i1) { // XXX: early exit!

2
lib/Target/PowerPC/PPCCodeEmitter.cpp
View File

@ -160,7 +160,7 @@ int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
Reloc = PPC::reloc_pcrel_bx;
else {
switch (MI.getOpcode()) {
default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
default: DEBUG(MI.dump()); assert(0 && "Unknown instruction for relocation!");
case PPC::LIS:
Reloc = PPC::reloc_absolute_high; // Pointer to symbol
break;

8
utils/TableGen/DAGISelEmitter.cpp
View File

@ -2136,7 +2136,7 @@ public:
if (DefInit *Pred = dynamic_cast<DefInit*>(Predicates->getElement(i))) {
Record *Def = Pred->getDef();
if (!Def->isSubClassOf("Predicate")) {
Def->dump();
DEBUG(Def->dump());
assert(0 && "Unknown predicate type!");
}
if (!PredicateCheck.empty())
@ -2344,7 +2344,7 @@ public:
emitCheck("cast<CondCodeSDNode>(" + RootName + utostr(OpNo) +
")->get() == ISD::" + LeafRec->getName());
} else {
Child->dump();
DEBUG(Child->dump());
std::cerr << " ";
assert(0 && "Unknown leaf type!");
}
@ -2357,7 +2357,7 @@ public:
emitCheck("CN" + utostr(CTmp) + " == " +itostr(II->getValue()));
} else {
Child->dump();
DEBUG(Child->dump());
assert(0 && "Unknown leaf type!");
}
}
@ -2510,7 +2510,7 @@ public:
return std::make_pair(1, ResNo);
}
N->dump();
DEBUG(N->dump());
assert(0 && "Unknown leaf type!");
return std::make_pair(1, ~0U);
}