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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-22 10:29:35 +00:00
Fix a couple more places where we are creating ld / st instructions without memoperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85746 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -17,6 +17,8 @@
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#include "ARMMachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/PseudoSourceValue.h"
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#include "llvm/ADT/SmallVector.h"
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#include "Thumb1InstrInfo.h"
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@ -122,9 +124,16 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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isARMLowRegister(SrcReg))) && "Unknown regclass!");
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if (RC == ARM::tGPRRegisterClass) {
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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MachineMemOperand *MMO =
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MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
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MachineMemOperand::MOStore, 0,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSpill))
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.addReg(SrcReg, getKillRegState(isKill))
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.addFrameIndex(FI).addImm(0));
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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}
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}
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@ -140,8 +149,15 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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isARMLowRegister(DestReg))) && "Unknown regclass!");
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if (RC == ARM::tGPRRegisterClass) {
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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MachineMemOperand *MMO =
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MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
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MachineMemOperand::MOLoad, 0,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tRestore), DestReg)
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.addFrameIndex(FI).addImm(0));
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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}
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}
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@ -18,6 +18,8 @@
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#include "ARMMachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/PseudoSourceValue.h"
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#include "llvm/ADT/SmallVector.h"
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#include "Thumb2InstrInfo.h"
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@ -90,9 +92,16 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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if (I != MBB.end()) DL = I->getDebugLoc();
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if (RC == ARM::GPRRegisterClass) {
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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MachineMemOperand *MMO =
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MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
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MachineMemOperand::MOStore, 0,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2STRi12))
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.addReg(SrcReg, getKillRegState(isKill))
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.addFrameIndex(FI).addImm(0));
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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return;
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}
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@ -107,8 +116,15 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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if (I != MBB.end()) DL = I->getDebugLoc();
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if (RC == ARM::GPRRegisterClass) {
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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MachineMemOperand *MMO =
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MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
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MachineMemOperand::MOLoad, 0,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::t2LDRi12), DestReg)
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.addFrameIndex(FI).addImm(0));
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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return;
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}
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