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Replace "../whatever.td" with "whatever.td", so that out-of-tree backends
can just add lib/Target to TableGen includes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28318 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -404,7 +404,8 @@ LTInstall = $(LIBTOOL) $(LibTool.Flags) --mode=install $(INSTALL) \
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ProgInstall = $(INSTALL) $(Install.StripFlag) -m 0755
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ProgInstall = $(INSTALL) $(Install.StripFlag) -m 0755
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ScriptInstall = $(INSTALL) -m 0755
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ScriptInstall = $(INSTALL) -m 0755
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DataInstall = $(INSTALL) -m 0644
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DataInstall = $(INSTALL) -m 0644
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TableGen = $(TBLGEN) -I $(PROJ_SRC_DIR) -I$(PROJ_SRC_ROOT)/include
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TableGen = $(TBLGEN) -I $(PROJ_SRC_DIR) -I$(PROJ_SRC_ROOT)/include \
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-I $(PROJ_SRC_ROOT)/lib/Target
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Archive = $(AR) $(AR.Flags)
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Archive = $(AR) $(AR.Flags)
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LArchive = $(LLVMToolDir)/llvm-ar rcsf
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LArchive = $(LLVMToolDir)/llvm-ar rcsf
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ifdef RANLIB
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ifdef RANLIB
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@ -118,7 +118,7 @@ class DwarfRegNum<int N> {
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Pull in the common support for scheduling
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// Pull in the common support for scheduling
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//
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//
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include "../TargetSchedule.td"
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include "TargetSchedule.td"
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class Predicate; // Forward def
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class Predicate; // Forward def
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@ -327,4 +327,4 @@ class Processor<string n, ProcessorItineraries pi, list<SubtargetFeature> f> {
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Pull in the common support for DAG isel generation
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// Pull in the common support for DAG isel generation
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//
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//
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include "../TargetSelectionDAG.td"
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include "TargetSelectionDAG.td"
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