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The result of getSetCCResultType (eg: i32) may be larger

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than the type an i1 is promoted to (eg: i8).  Account
for this.  Noticed by Tilmann Scheller on CellSPU; he
will hopefully take care of fixing this in LegalizeDAG
and adding a testcase!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56997 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2008-10-03 07:41:46 +00:00
parent a2582da44d
commit e47561ccff
1 changed files with 8 additions and 4 deletions
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12
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@ -365,10 +365,14 @@ SDValue DAGTypeLegalizer::PromoteIntRes_SELECT_CC(SDNode *N) {
} }
SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) { SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) {
assert(isTypeLegal(TLI.getSetCCResultType(N->getOperand(0))) MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
&& "SetCC type is not legal??"); MVT SVT = TLI.getSetCCResultType(N->getOperand(0));
return DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(N->getOperand(0)), assert(isTypeLegal(SVT) && "SetCC type not legal??");
N->getOperand(0), N->getOperand(1), N->getOperand(2)); assert(NVT.getSizeInBits() <= SVT.getSizeInBits() &&
"Integer type overpromoted?");
return DAG.getNode(ISD::TRUNCATE, NVT,
DAG.getNode(ISD::SETCC, SVT, N->getOperand(0),
N->getOperand(1), N->getOperand(2)));
} }
SDValue DAGTypeLegalizer::PromoteIntRes_SHL(SDNode *N) { SDValue DAGTypeLegalizer::PromoteIntRes_SHL(SDNode *N) {