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https://github.com/c64scene-ar/llvm-6502.git
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[PowerPC] Use assembler source in MC tests
A couple of old test cases in test/MC/PowerPC were still using LLVM IR. Now that we have a working assembler, we can move them to assembler tests instead: ppc64-initial-cfa.ll ppc64-relocs-01.ll ppc64-tls-relocs-01.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183829 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ulrich Weigand
parent
2e0372d69a
commit
e48e8c7a60
@ -1,87 +0,0 @@
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; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=static %s -o - | \
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; RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC
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; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=pic %s -o - | \
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; RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC
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; FIXME: this file should be in .s form, change when asm parser is available.
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define void @f() {
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entry:
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ret void
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}
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; STATIC: Section {
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; STATIC: Name: .eh_frame
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; STATIC-NEXT: Type: SHT_PROGBITS
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; STATIC-NEXT: Flags [ (0x2)
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; STATIC-NEXT: SHF_ALLOC
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; STATIC-NEXT: ]
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; STATIC-NEXT: Address:
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; STATIC-NEXT: Offset:
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; STATIC-NEXT: Size: 40
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; STATIC-NEXT: Link: 0
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; STATIC-NEXT: Info: 0
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; STATIC-NEXT: AddressAlignment: 8
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; STATIC-NEXT: EntrySize:
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; STATIC-NEXT: Relocations [
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; STATIC-NEXT: ]
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; STATIC-NEXT: SectionData (
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; STATIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
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; STATIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
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; STATIC-NEXT: 0020: 00000010 00000000
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; STATIC-NEXT: )
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; STATIC-NEXT: }
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; STATIC: Section {
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; STATIC: Name: .rela.eh_frame
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; STATIC-NEXT: Type: SHT_RELA
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; STATIC-NEXT: Flags [ (0x0)
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; STATIC-NEXT: ]
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; STATIC-NEXT: Address:
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; STATIC-NEXT: Offset:
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; STATIC-NEXT: Size: 24
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; STATIC-NEXT: Link:
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; STATIC-NEXT: Info:
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; STATIC-NEXT: AddressAlignment: 8
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; STATIC-NEXT: EntrySize: 24
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; STATIC-NEXT: Relocations [
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; STATIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
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; STATIC-NEXT: ]
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; PIC: Section {
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; PIC: Name: .eh_frame
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; PIC-NEXT: Type: SHT_PROGBITS
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; PIC-NEXT: Flags [ (0x2)
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; PIC-NEXT: SHF_ALLOC
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; PIC-NEXT: ]
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; PIC-NEXT: Address:
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; PIC-NEXT: Offset:
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; PIC-NEXT: Size: 40
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; PIC-NEXT: Link: 0
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; PIC-NEXT: Info: 0
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; PIC-NEXT: AddressAlignment: 8
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; PIC-NEXT: EntrySize: 0
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; PIC-NEXT: Relocations [
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; PIC-NEXT: ]
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; PIC-NEXT: SectionData (
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; PIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
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; PIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
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; PIC-NEXT: 0020: 00000010 00000000
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; PIC-NEXT: )
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; PIC-NEXT: }
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; PIC: Section {
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; PIC: Name: .rela.eh_frame
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; PIC-NEXT: Type: SHT_RELA
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; PIC-NEXT: Flags [ (0x0)
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; PIC-NEXT: ]
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; PIC-NEXT: Address:
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; PIC-NEXT: Offset:
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; PIC-NEXT: Size: 24
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; PIC-NEXT: Link:
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; PIC-NEXT: Info:
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; PIC-NEXT: AddressAlignment: 8
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; PIC-NEXT: EntrySize: 24
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; PIC-NEXT: Relocations [
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; PIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
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; PIC-NEXT: ]
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84
test/MC/PowerPC/ppc64-initial-cfa.s
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84
test/MC/PowerPC/ppc64-initial-cfa.s
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@ -0,0 +1,84 @@
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# RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=static %s | \
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# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC
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# RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=pic %s | \
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# RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC
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.cfi_startproc
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nop
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.cfi_endproc
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# STATIC: Section {
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# STATIC: Name: .eh_frame
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# STATIC-NEXT: Type: SHT_PROGBITS
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# STATIC-NEXT: Flags [ (0x2)
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# STATIC-NEXT: SHF_ALLOC
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# STATIC-NEXT: ]
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# STATIC-NEXT: Address:
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# STATIC-NEXT: Offset:
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# STATIC-NEXT: Size: 40
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# STATIC-NEXT: Link: 0
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# STATIC-NEXT: Info: 0
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# STATIC-NEXT: AddressAlignment: 8
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# STATIC-NEXT: EntrySize:
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# STATIC-NEXT: Relocations [
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# STATIC-NEXT: ]
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# STATIC-NEXT: SectionData (
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# STATIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
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# STATIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
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# STATIC-NEXT: 0020: 00000004 00000000
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# STATIC-NEXT: )
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# STATIC-NEXT: }
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# STATIC: Section {
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# STATIC: Name: .rela.eh_frame
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# STATIC-NEXT: Type: SHT_RELA
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# STATIC-NEXT: Flags [ (0x0)
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# STATIC-NEXT: ]
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# STATIC-NEXT: Address:
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# STATIC-NEXT: Offset:
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# STATIC-NEXT: Size: 24
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# STATIC-NEXT: Link:
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# STATIC-NEXT: Info:
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# STATIC-NEXT: AddressAlignment: 8
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# STATIC-NEXT: EntrySize: 24
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# STATIC-NEXT: Relocations [
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# STATIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
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# STATIC-NEXT: ]
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# PIC: Section {
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# PIC: Name: .eh_frame
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# PIC-NEXT: Type: SHT_PROGBITS
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# PIC-NEXT: Flags [ (0x2)
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# PIC-NEXT: SHF_ALLOC
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# PIC-NEXT: ]
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# PIC-NEXT: Address:
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# PIC-NEXT: Offset:
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# PIC-NEXT: Size: 40
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# PIC-NEXT: Link: 0
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# PIC-NEXT: Info: 0
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# PIC-NEXT: AddressAlignment: 8
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# PIC-NEXT: EntrySize: 0
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# PIC-NEXT: Relocations [
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# PIC-NEXT: ]
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# PIC-NEXT: SectionData (
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# PIC-NEXT: 0000: 00000010 00000000 017A5200 01784101
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# PIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000
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# PIC-NEXT: 0020: 00000004 00000000
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# PIC-NEXT: )
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# PIC-NEXT: }
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# PIC: Section {
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# PIC: Name: .rela.eh_frame
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# PIC-NEXT: Type: SHT_RELA
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# PIC-NEXT: Flags [ (0x0)
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# PIC-NEXT: ]
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# PIC-NEXT: Address:
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# PIC-NEXT: Offset:
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# PIC-NEXT: Size: 24
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# PIC-NEXT: Link:
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# PIC-NEXT: Info:
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# PIC-NEXT: AddressAlignment: 8
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# PIC-NEXT: EntrySize: 24
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# PIC-NEXT: Relocations [
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# PIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0
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# PIC-NEXT: ]
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@ -1,49 +0,0 @@
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;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -O3 -code-model=small \
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;; RUN: -filetype=obj %s -o - | \
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;; RUN: llvm-readobj -r | FileCheck %s
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;; FIXME: this file need to be in .s form, change when asm parse is done.
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@number64 = global i64 10, align 8
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define i64 @access_int64(i64 %a) nounwind readonly {
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entry:
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%0 = load i64* @number64, align 8
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%cmp = icmp eq i64 %0, %a
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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}
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declare double @sin(double) nounwind
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define double @test_branch24 (double %x) nounwind readonly {
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entry:
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%add = call double @sin(double %x) nounwind
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ret double %add
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}
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;; CHECK: Relocations [
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;; The relocations in .rela.text are the 'number64' load using a
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;; R_PPC64_TOC16_DS against the .toc and the 'sin' external function
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;; address using a R_PPC64_REL24
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;; CHECK: Section ({{[0-9]+}}) .rela.text {
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;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS .toc
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;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_REL24 sin
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;; CHECK-NEXT: }
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;; The .opd entry for the 'access_int64' function creates 2 relocations:
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;; 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function
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; address itself);
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;; 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
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;; module's TOC base).
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;; CHECK: Section ({{[0-9]+}}) .rela.opd {
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;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 .text 0x0
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;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC - 0x0
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;; Finally the TOC creates the relocation for the 'number64'.
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;; CHECK: Section ({{[0-9]+}}) .rela.toc {
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;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 number64 0x0
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;; CHECK-NEXT: }
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;; CHECK-NEXT: ]
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46
test/MC/PowerPC/ppc64-relocs-01.s
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46
test/MC/PowerPC/ppc64-relocs-01.s
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@ -0,0 +1,46 @@
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# RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj %s | \
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# RUN: llvm-readobj -r | FileCheck %s
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.section .opd,"aw",@progbits
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access_int64:
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.quad .L.access_int64
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.quad .TOC.@tocbase
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.quad 0
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.text
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.L.access_int64:
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ld 4, .LC1@toc(2)
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bl sin
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.section .toc,"aw",@progbits
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.LC1:
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.tc number64[TC],number64
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.data
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.globl number64
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number64:
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.quad 10
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# CHECK: Relocations [
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# The relocations in .rela.text are the 'number64' load using a
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# R_PPC64_TOC16_DS against the .toc and the 'sin' external function
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# address using a R_PPC64_REL24
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# CHECK: Section ({{[0-9]+}}) .rela.text {
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# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS .toc
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# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_REL24 sin
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# CHECK-NEXT: }
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# The .opd entry for the 'access_int64' function creates 2 relocations:
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# 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function
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# address itself);
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# 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
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# module's TOC base).
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# CHECK: Section ({{[0-9]+}}) .rela.opd {
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# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 .text 0x0
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# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC - 0x0
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# Finally the TOC creates the relocation for the 'number64'.
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# CHECK: Section ({{[0-9]+}}) .rela.toc {
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# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 number64 0x0
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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@ -1,19 +0,0 @@
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;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj %s -o - | \
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;; RUN: llvm-readobj -r | FileCheck %s
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;; FIXME: this file should be in .s form, change when asm parser is available.
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@t = thread_local global i32 0, align 4
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define i32* @f() nounwind {
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entry:
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ret i32* @t
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}
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;; Check for a pair of R_PPC64_TPREL16_HA / R_PPC64_TPREL16_LO relocs
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;; against the thread-local symbol 't'.
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;; CHECK: Relocations [
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;; CHECK: Section ({{[0-9]+}}) .rela.text {
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;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA t
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;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO t
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;; CHECK-NEXT: }
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22
test/MC/PowerPC/ppc64-tls-relocs-01.s
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22
test/MC/PowerPC/ppc64-tls-relocs-01.s
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@ -0,0 +1,22 @@
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# RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj %s | \
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# RUN: llvm-readobj -r | FileCheck %s
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.text
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addis 3, 13, t@tprel@ha
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addi 3, 3, t@tprel@l
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.type t,@object
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.section .tbss,"awT",@nobits
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.globl t
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.align 2
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t:
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.long 0
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.size t, 4
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# Check for a pair of R_PPC64_TPREL16_HA / R_PPC64_TPREL16_LO relocs
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# against the thread-local symbol 't'.
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# CHECK: Relocations [
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# CHECK: Section ({{[0-9]+}}) .rela.text {
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# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA t
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# CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO t
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# CHECK-NEXT: }
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