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Reapply r201180 with an additional error path.

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Debug info: Emit values in subregisters that do not have a separate
DWARF register number by emitting a super-register + DW_OP_bit_piece.
This is necessary because on x86_64, there are no DWARF register numbers
for i386-style subregisters.
Fixes a bunch of FIXMEs.

rdar://problem/16015314

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201190 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adrian Prantl
2014-02-11 22:22:15 +00:00
parent 20d5e1b247
commit e48e9419ea
4 changed files with 180 additions and 5 deletions
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30
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
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@@ -868,12 +868,14 @@ void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
bool Indirect) const {
const TargetRegisterInfo *TRI = TM.getRegisterInfo();
int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
bool isSubRegister = Reg < 0;
unsigned Idx = 0;
for (MCSuperRegIterator SR(MLoc.getReg(), TRI); SR.isValid() && Reg < 0;
++SR) {
Reg = TRI->getDwarfRegNum(*SR, false);
// FIXME: Get the bit range this register uses of the superregister
// so that we can produce a DW_OP_bit_piece
if (Reg >= 0)
Idx = TRI->getSubRegIndex(*SR, MLoc.getReg());
}
// FIXME: Handle cases like a super register being encoded as
@@ -882,6 +884,11 @@ void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
// FIXME: We have no reasonable way of handling errors in here. The
// caller might be in the middle of an dwarf expression. We should
// probably assert that Reg >= 0 once debug info generation is more mature.
if (Reg < 0) {
OutStreamer.AddComment("nop (invalid dwarf register number)");
EmitInt8(dwarf::DW_OP_nop);
return;
}
if (MLoc.isIndirect() || Indirect) {
if (Reg < 32) {
@@ -910,7 +917,24 @@ void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
}
}
// FIXME: Produce a DW_OP_bit_piece if we used a superregister
// Emit Mask
if (isSubRegister) {
unsigned Size = TRI->getSubRegIdxSize(Idx);
unsigned Offset = TRI->getSubRegIdxOffset(Idx);
if (Offset > 0) {
OutStreamer.AddComment("DW_OP_bit_piece");
EmitInt8(dwarf::DW_OP_bit_piece);
OutStreamer.AddComment(Twine(Size));
EmitULEB128(Size);
OutStreamer.AddComment(Twine(Offset));
EmitULEB128(Offset);
} else {
OutStreamer.AddComment("DW_OP_piece");
EmitInt8(dwarf::DW_OP_piece);
OutStreamer.AddComment(Twine(Size));
EmitULEB128(Size);
}
}
}
bool AsmPrinter::doFinalization(Module &M) {