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* Print out full names for non-GPR or -FPR registers
* BuildMI() really *does* handle 0 params! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15680 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -451,9 +451,12 @@ void Printer::printOp(const MachineOperand &MO,
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// FALLTHROUGH
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// FALLTHROUGH
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_MachineRegister:
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case MachineOperand::MO_CCRegister: {
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case MachineOperand::MO_CCRegister: {
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// On AIX, do not print out the 'r' in register names
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// On AIX, do not print out the 'R' (GPR) or 'F' (FPR) in reg names
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const char *regName = RI.get(MO.getReg()).Name;
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const char *regName = RI.get(MO.getReg()).Name;
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O << ®Name[1];
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if (regName[0] == 'R' || regName[0] == 'F')
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O << ®Name[1];
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else
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O << regName;
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return;
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return;
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}
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}
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@ -571,7 +574,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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O << TII.getName(Opcode) << " ";
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O << TII.getName(Opcode) << " ";
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if (Opcode == PPC::BLR || Opcode == PPC::NOP) {
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if (Opcode == PPC::BLR || Opcode == PPC::NOP) {
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// FIXME: BuildMI() should handle 0 params
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O << "\n";
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O << "\n";
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} else if (ArgCount == 3 &&
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} else if (ArgCount == 3 &&
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(ArgType[1] == PPCII::Disimm16 || ArgType[1] == PPCII::Disimm14)) {
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(ArgType[1] == PPCII::Disimm16 || ArgType[1] == PPCII::Disimm14)) {
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