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LoopVectorizer:
1. Add code to estimate register pressure. 2. Add code to select the unroll factor based on register pressure. 3. Add bits to TargetTransformInfo to provide the number of registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171469 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem
parent
e12bf18754
commit
e503319874
@ -69,6 +69,8 @@ public:
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virtual ~VectorTargetTransformImpl() {}
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virtual unsigned getNumberOfRegisters(bool Vector) const;
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virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const;
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virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
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@ -164,12 +164,19 @@ public:
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ExtractSubvector // ExtractSubvector Index indicates start offset.
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};
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/// Returns the expected cost of arithmetic ops, such as mul, xor, fsub, etc.
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/// \return The number of scalar or vector registers that the target has.
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/// If 'Vectors' is true, it returns the number of vector registers. If it is
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/// set to false, it returns the number of scalar registers.
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virtual unsigned getNumberOfRegisters(bool Vector) const {
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return 8;
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}
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/// \return The expected cost of arithmetic ops, such as mul, xor, fsub, etc.
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virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const {
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return 1;
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}
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/// Returns the cost of a shuffle instruction of kind Kind and of type Tp.
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/// \return The cost of a shuffle instruction of kind Kind and of type Tp.
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/// The index and subtype parameters are used by the subvector insertion and
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/// extraction shuffle kinds.
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virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
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@ -177,47 +184,47 @@ public:
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return 1;
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}
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/// Returns the expected cost of cast instructions, such as bitcast, trunc,
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/// \return The expected cost of cast instructions, such as bitcast, trunc,
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/// zext, etc.
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virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
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Type *Src) const {
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return 1;
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}
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/// Returns the expected cost of control-flow related instrutctions such as
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/// \return The expected cost of control-flow related instrutctions such as
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/// Phi, Ret, Br.
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virtual unsigned getCFInstrCost(unsigned Opcode) const {
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return 1;
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}
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/// Returns the expected cost of compare and select instructions.
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/// \returns The expected cost of compare and select instructions.
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virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
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Type *CondTy = 0) const {
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return 1;
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}
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/// Returns the expected cost of vector Insert and Extract.
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/// \return The expected cost of vector Insert and Extract.
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/// Use -1 to indicate that there is no information on the index value.
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virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
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unsigned Index = -1) const {
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return 1;
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}
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/// Returns the cost of Load and Store instructions.
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/// \return The cost of Load and Store instructions.
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virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned Alignment,
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unsigned AddressSpace) const {
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return 1;
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}
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/// Returns the cost of Intrinsic instructions.
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/// \returns The cost of Intrinsic instructions.
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virtual unsigned getIntrinsicInstrCost(Intrinsic::ID,
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Type *RetTy,
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ArrayRef<Type*> Tys) const {
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return 1;
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}
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/// Returns the number of pieces into which the provided type must be
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/// \returns The number of pieces into which the provided type must be
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/// split during legalization. Zero is returned when the answer is unknown.
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virtual unsigned getNumberOfParts(Type *Tp) const {
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return 0;
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@ -171,6 +171,10 @@ VectorTargetTransformImpl::getScalarizationOverhead(Type *Ty,
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return Cost;
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}
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unsigned VectorTargetTransformImpl::getNumberOfRegisters(bool Vector) const {
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return 8;
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}
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unsigned VectorTargetTransformImpl::getArithmeticInstrCost(unsigned Opcode,
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Type *Ty) const {
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// Check if any of the operands are vector operands.
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@ -18115,6 +18115,13 @@ X86ScalarTargetTransformImpl::getPopcntHwSupport(unsigned TyWidth) const {
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return ST.hasSSE41() ? Fast : None;
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}
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unsigned X86VectorTargetTransformInfo::getNumberOfRegisters(bool Vector) const {
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const X86Subtarget &ST = TLI->getTargetMachine().getSubtarget<X86Subtarget>();
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if (ST.is64Bit())
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return 16;
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return 8;
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}
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unsigned
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X86VectorTargetTransformInfo::getArithmeticInstrCost(unsigned Opcode,
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Type *Ty) const {
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@ -959,6 +959,8 @@ namespace llvm {
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explicit X86VectorTargetTransformInfo(const TargetLowering *TL) :
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VectorTargetTransformImpl(TL) {}
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virtual unsigned getNumberOfRegisters(bool Vector) const;
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virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const;
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virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
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@ -7,6 +7,7 @@
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//
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//===----------------------------------------------------------------------===//
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#include "LoopVectorize.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/AliasSetTracker.h"
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@ -43,7 +44,7 @@ VectorizationFactor("force-vector-width", cl::init(0), cl::Hidden,
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cl::desc("Sets the SIMD width. Zero is autoselect."));
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static cl::opt<unsigned>
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VectorizationUnroll("force-vector-unroll", cl::init(1), cl::Hidden,
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VectorizationUnroll("force-vector-unroll", cl::init(0), cl::Hidden,
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cl::desc("Sets the vectorization unroll count. "
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"Zero is autoselect."));
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@ -94,7 +95,7 @@ struct LoopVectorize : public LoopPass {
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if (TTI)
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VTTI = TTI->getVectorTargetTransformInfo();
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// Use the cost model.
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LoopVectorizationCostModel CM(L, SE, &LVL, VTTI);
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LoopVectorizationCostModel CM(L, SE, LI, &LVL, VTTI);
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// Check the function attribues to find out if this function should be
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// optimized for size.
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@ -112,6 +113,7 @@ struct LoopVectorize : public LoopPass {
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}
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unsigned VF = CM.selectVectorizationFactor(OptForSize, VectorizationFactor);
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unsigned UF = CM.selectUnrollFactor(OptForSize, VectorizationUnroll);
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if (VF == 1) {
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DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial.\n");
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@ -120,9 +122,10 @@ struct LoopVectorize : public LoopPass {
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DEBUG(dbgs() << "LV: Found a vectorizable loop ("<< VF << ") in "<<
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F->getParent()->getModuleIdentifier()<<"\n");
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DEBUG(dbgs() << "LV: Unroll Factor is " << UF << "\n");
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// If we decided that it is *legal* to vectorizer the loop then do it.
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InnerLoopVectorizer LB(L, SE, LI, DT, DL, VF, VectorizationUnroll);
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InnerLoopVectorizer LB(L, SE, LI, DT, DL, VF, UF);
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LB.vectorize(&LVL);
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DEBUG(verifyFunction(*L->getHeader()->getParent()));
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@ -2082,7 +2085,7 @@ bool LoopVectorizationLegality::hasComputableBounds(Value *Ptr) {
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unsigned
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LoopVectorizationCostModel::selectVectorizationFactor(bool OptForSize,
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unsigned UserVF) {
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unsigned UserVF) {
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if (OptForSize && Legal->getRuntimePointerCheck()->Need) {
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DEBUG(dbgs() << "LV: Aborting. Runtime ptr check is required in Os.\n");
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return 1;
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@ -2148,6 +2151,161 @@ LoopVectorizationCostModel::selectVectorizationFactor(bool OptForSize,
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return Width;
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}
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unsigned
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LoopVectorizationCostModel::selectUnrollFactor(bool OptForSize,
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unsigned UserUF) {
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// Use the user preference, unless 'auto' is selected.
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if (UserUF != 0)
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return UserUF;
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// When we optimize for size we don't unroll.
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if (OptForSize)
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return 1;
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unsigned TargetVectorRegisters = VTTI->getNumberOfRegisters(true);
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DEBUG(dbgs() << "LV: The target has " << TargetVectorRegisters <<
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" vector registers\n");
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LoopVectorizationCostModel::RegisterUsage R = calculateRegisterUsage();
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// We divide by these constants so assume that we have at least one
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// instruction that uses at least one register.
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R.MaxLocalUsers = std::max(R.MaxLocalUsers, 1U);
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R.NumInstructions = std::max(R.NumInstructions, 1U);
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// We calculate the unroll factor using the following formula.
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// Subtract the number of loop invariants from the number of available
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// registers. These registers are used by all of the unrolled instances.
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// Next, divide the remaining registers by the number of registers that is
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// required by the loop, in order to estimate how many parallel instances
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// fit without causing spills.
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unsigned UF = (TargetVectorRegisters - R.LoopInvariantRegs) / R.MaxLocalUsers;
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// We don't want to unroll the loops to the point where they do not fit into
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// the decoded cache. Assume that we only allow 32 IR instructions.
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UF = std::min(UF, (32 / R.NumInstructions));
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// Clamp the unroll factor ranges to reasonable factors.
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if (UF > MaxUnrollSize)
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UF = MaxUnrollSize;
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else if (UF < 1)
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UF = 1;
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return UF;
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}
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LoopVectorizationCostModel::RegisterUsage
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LoopVectorizationCostModel::calculateRegisterUsage() {
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// This function calculates the register usage by measuring the highest number
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// of values that are alive at a single location. Obviously, this is a very
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// rough estimation. We scan the loop in a topological order in order and
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// assign a number to each instruction. We use RPO to ensure that defs are
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// met before their users. We assume that each instruction that has in-loop
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// users starts an interval. We record every time that an in-loop value is
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// used, so we have a list of the first and last occurrences of each
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// instruction. Next, we transpose this data structure into a multi map that
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// holds the list of intervals that *end* at a specific location. This multi
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// map allows us to perform a linear search. We scan the instructions linearly
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// and record each time that a new interval starts, by placing it in a set.
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// If we find this value in the multi-map then we remove it from the set.
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// The max register usage is the maximum size of the set.
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// We also search for instructions that are defined outside the loop, but are
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// used inside the loop. We need this number separately from the max-interval
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// usage number because when we unroll, loop-invariant values do not take
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// more register.
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LoopBlocksDFS DFS(TheLoop);
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DFS.perform(LI);
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RegisterUsage R;
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R.NumInstructions = 0;
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// Each 'key' in the map opens a new interval. The values
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// of the map are the index of the 'last seen' usage of the
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// instruction that is the key.
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typedef DenseMap<Instruction*, unsigned> IntervalMap;
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// Maps instruction to its index.
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DenseMap<unsigned, Instruction*> IdxToInstr;
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// Marks the end of each interval.
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IntervalMap EndPoint;
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// Saves the list of instruction indices that are used in the loop.
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SmallSet<Instruction*, 8> Ends;
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// Saves the list of values that are used in the loop but are
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// defined outside the loop, such as arguments and constants.
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SmallPtrSet<Value*, 8> LoopInvariants;
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unsigned Index = 0;
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for (LoopBlocksDFS::RPOIterator bb = DFS.beginRPO(),
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be = DFS.endRPO(); bb != be; ++bb) {
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R.NumInstructions += (*bb)->size();
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for (BasicBlock::iterator it = (*bb)->begin(), e = (*bb)->end(); it != e;
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++it) {
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Instruction *I = it;
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IdxToInstr[Index++] = I;
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// Save the end location of each USE.
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for (unsigned i = 0; i < I->getNumOperands(); ++i) {
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Value *U = I->getOperand(i);
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Instruction *Instr = dyn_cast<Instruction>(U);
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// Ignore non-instruction values such as arguments, constants, etc.
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if (!Instr) continue;
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// If this instruction is outside the loop then record it and continue.
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if (!TheLoop->contains(Instr)) {
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LoopInvariants.insert(Instr);
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continue;
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}
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// Overwrite previous end points.
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EndPoint[Instr] = Index;
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Ends.insert(Instr);
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}
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}
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}
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// Saves the list of intervals that end with the index in 'key'.
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typedef SmallVector<Instruction*, 2> InstrList;
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DenseMap<unsigned, InstrList> TransposeEnds;
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// Transpose the EndPoints to a list of values that end at each index.
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for (IntervalMap::iterator it = EndPoint.begin(), e = EndPoint.end();
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it != e; ++it)
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TransposeEnds[it->second].push_back(it->first);
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SmallSet<Instruction*, 8> OpenIntervals;
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unsigned MaxUsage = 0;
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DEBUG(dbgs() << "LV(REG): Calculating max register usage:\n");
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for (unsigned int i = 0; i < Index; ++i) {
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Instruction *I = IdxToInstr[i];
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// Ignore instructions that are never used within the loop.
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if (!Ends.count(I)) continue;
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// Remove all of the instructions that end at this location.
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InstrList &List = TransposeEnds[i];
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for (unsigned int i=0, e = List.size(); i < e; ++i)
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OpenIntervals.erase(List[i]);
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// Count the number of live interals.
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MaxUsage = std::max(MaxUsage, OpenIntervals.size());
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DEBUG(dbgs() << "LV(REG): At #" << i << " Interval # " <<
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OpenIntervals.size() <<"\n");
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// Add the current instruction to the list of open intervals.
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OpenIntervals.insert(I);
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}
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unsigned Invariant = LoopInvariants.size();
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DEBUG(dbgs() << "LV(REG): Found max usage: " << MaxUsage << " \n");
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DEBUG(dbgs() << "LV(REG): Found invariant usage: " << Invariant << " \n");
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DEBUG(dbgs() << "LV(REG): LoopSize: " << R.NumInstructions << " \n");
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R.LoopInvariantRegs = Invariant;
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R.MaxLocalUsers = MaxUsage;
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return R;
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}
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unsigned LoopVectorizationCostModel::expectedCost(unsigned VF) {
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unsigned Cost = 0;
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@ -68,6 +68,9 @@ const unsigned RuntimeMemoryCheckThreshold = 4;
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/// This is the highest vector width that we try to generate.
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const unsigned MaxVectorSize = 8;
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/// This is the highest Unroll Factor.
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const unsigned MaxUnrollSize = 4;
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namespace llvm {
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// Forward declarations.
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@ -473,17 +476,37 @@ private:
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class LoopVectorizationCostModel {
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public:
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/// C'tor.
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LoopVectorizationCostModel(Loop *Lp, ScalarEvolution *Se,
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LoopVectorizationCostModel(Loop *Lp, ScalarEvolution *Se, LoopInfo *Li,
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LoopVectorizationLegality *Leg,
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const VectorTargetTransformInfo *Vtti):
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TheLoop(Lp), SE(Se), Legal(Leg), VTTI(Vtti) { }
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TheLoop(Lp), SE(Se), LI(Li), Legal(Leg), VTTI(Vtti) { }
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/// Returns the most profitable vectorization factor in powers of two.
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/// \return The most profitable vectorization factor.
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/// This method checks every power of two up to VF. If UserVF is not ZERO
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/// then this vectorization factor will be selected if vectorization is
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/// possible.
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unsigned selectVectorizationFactor(bool OptForSize, unsigned UserVF);
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/// \return The most profitable unroll factor.
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/// If UserUF is non-zero then this method finds the best unroll-factor
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/// based on register pressure and other parameters.
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unsigned selectUnrollFactor(bool OptForSize, unsigned UserUF);
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/// \brief A struct that represents some properties of the register usage
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/// of a loop.
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struct RegisterUsage {
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/// Holds the number of loop invariant values that are used in the loop.
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unsigned LoopInvariantRegs;
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/// Holds the maximum number of concurrent live intervals in the loop.
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unsigned MaxLocalUsers;
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/// Holds the number of instructions in the loop.
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unsigned NumInstructions;
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};
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/// \return information about the register usage of the loop.
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RegisterUsage calculateRegisterUsage();
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private:
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/// Returns the expected execution cost. The unit of the cost does
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/// not matter because we use the 'cost' units to compare different
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@ -504,7 +527,8 @@ private:
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Loop *TheLoop;
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/// Scev analysis.
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ScalarEvolution *SE;
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/// Loop Info analysis.
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LoopInfo *LI;
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/// Vectorization legality.
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LoopVectorizationLegality *Legal;
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/// Vector target information.
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@ -1,4 +1,5 @@
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; RUN: opt < %s -loop-vectorize -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 -dce -instcombine -licm -S | FileCheck %s
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; RUN: opt < %s -loop-vectorize -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 -force-vector-unroll=0 -dce -instcombine -licm -S | FileCheck %s -check-prefix=UNROLL
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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@ -13,6 +14,15 @@ target triple = "x86_64-apple-macosx10.8.0"
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;CHECK: add nsw <4 x i32>
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;CHECK: store <4 x i32>
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;CHECK: ret void
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;UNROLL: @example1
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;UNROLL: load <4 x i32>
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;UNROLL: load <4 x i32>
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;UNROLL: add nsw <4 x i32>
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;UNROLL: add nsw <4 x i32>
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;UNROLL: store <4 x i32>
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;UNROLL: store <4 x i32>
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;UNROLL: ret void
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define void @example1() nounwind uwtable ssp {
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br label %1
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@ -34,13 +44,20 @@ define void @example1() nounwind uwtable ssp {
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ret void
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}
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; Select VF=4 because sext <8 x i1> to <8 x i32> is expensive.
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; Select VF=4 because sext <8 x i1> to <8 x i32> is expensive.
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;CHECK: @example10b
|
||||
;CHECK: load <4 x i16>
|
||||
;CHECK: sext <4 x i16>
|
||||
;CHECK: store <4 x i32>
|
||||
;CHECK: ret void
|
||||
;UNROLL: @example10b
|
||||
;UNROLL: load <4 x i16>
|
||||
;UNROLL: load <4 x i16>
|
||||
;UNROLL: load <4 x i16>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: ret void
|
||||
define void @example10b(i16* noalias nocapture %sa, i16* noalias nocapture %sb, i16* noalias nocapture %sc, i32* noalias nocapture %ia, i32* noalias nocapture %ib, i32* noalias nocapture %ic) nounwind uwtable ssp {
|
||||
br label %1
|
||||
|
||||
|
||||
@ -1,4 +1,5 @@
|
||||
; RUN: opt < %s -loop-vectorize -force-vector-width=4 -dce -instcombine -licm -S | FileCheck %s
|
||||
; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-unroll=4 -dce -instcombine -licm -S | FileCheck %s -check-prefix=UNROLL
|
||||
|
||||
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-apple-macosx10.8.0"
|
||||
@ -24,6 +25,20 @@ target triple = "x86_64-apple-macosx10.8.0"
|
||||
;CHECK: add nsw <4 x i32>
|
||||
;CHECK: store <4 x i32>
|
||||
;CHECK: ret void
|
||||
;UNROLL: @example1
|
||||
;UNROLL: load <4 x i32>
|
||||
;UNROLL: load <4 x i32>
|
||||
;UNROLL: load <4 x i32>
|
||||
;UNROLL: load <4 x i32>
|
||||
;UNROLL: add nsw <4 x i32>
|
||||
;UNROLL: add nsw <4 x i32>
|
||||
;UNROLL: add nsw <4 x i32>
|
||||
;UNROLL: add nsw <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: ret void
|
||||
define void @example1() nounwind uwtable ssp {
|
||||
br label %1
|
||||
|
||||
@ -48,6 +63,12 @@ define void @example1() nounwind uwtable ssp {
|
||||
;CHECK: @example2
|
||||
;CHECK: store <4 x i32>
|
||||
;CHECK: ret void
|
||||
;UNROLL: @example2
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: ret void
|
||||
define void @example2(i32 %n, i32 %x) nounwind uwtable ssp {
|
||||
%1 = icmp sgt i32 %n, 0
|
||||
br i1 %1, label %.lr.ph5, label %.preheader
|
||||
@ -92,6 +113,12 @@ define void @example2(i32 %n, i32 %x) nounwind uwtable ssp {
|
||||
;CHECK: @example3
|
||||
;CHECK: <4 x i32>
|
||||
;CHECK: ret void
|
||||
;UNROLL: @example3
|
||||
;UNROLL: <4 x i32>
|
||||
;UNROLL: <4 x i32>
|
||||
;UNROLL: <4 x i32>
|
||||
;UNROLL: <4 x i32>
|
||||
;UNROLL: ret void
|
||||
define void @example3(i32 %n, i32* noalias nocapture %p, i32* noalias nocapture %q) nounwind uwtable ssp {
|
||||
%1 = icmp eq i32 %n, 0
|
||||
br i1 %1, label %._crit_edge, label %.lr.ph
|
||||
@ -115,6 +142,12 @@ define void @example3(i32 %n, i32* noalias nocapture %p, i32* noalias nocapture
|
||||
;CHECK: @example4
|
||||
;CHECK: load <4 x i32>
|
||||
;CHECK: ret void
|
||||
;UNROLL: @example4
|
||||
;UNROLL: load <4 x i32>
|
||||
;UNROLL: load <4 x i32>
|
||||
;UNROLL: load <4 x i32>
|
||||
;UNROLL: load <4 x i32>
|
||||
;UNROLL: ret void
|
||||
define void @example4(i32 %n, i32* noalias nocapture %p, i32* noalias nocapture %q) nounwind uwtable ssp {
|
||||
%1 = add nsw i32 %n, -1
|
||||
%2 = icmp eq i32 %n, 0
|
||||
@ -175,6 +208,12 @@ define void @example4(i32 %n, i32* noalias nocapture %p, i32* noalias nocapture
|
||||
;CHECK: @example8
|
||||
;CHECK: store <4 x i32>
|
||||
;CHECK: ret void
|
||||
;UNROLL: @example8
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: store <4 x i32>
|
||||
;UNROLL: ret void
|
||||
define void @example8(i32 %x) nounwind uwtable ssp {
|
||||
br label %.preheader
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user