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ARM: fix bug in -Oz stack adjustment folding
Previously, we clobbered callee-saved registers when folding an "add sp, #N" into a "pop {rD, ...}" instruction. This change checks whether a register we're going to add to the "pop" could actually be live outside the function before doing so and should fix the issue. This should fix PR18081. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196046 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1909,29 +1909,40 @@ bool llvm::tryFoldSPUpdateIntoPushPop(MachineFunction &MF,
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MachineBasicBlock *MBB = MI->getParent();
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const TargetRegisterInfo *TRI = MF.getRegInfo().getTargetRegisterInfo();
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const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF);
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// Now try to find enough space in the reglist to allocate NumBytes.
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for (unsigned CurReg = FirstReg - 1; CurReg >= RD0Reg && RegsNeeded;
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--CurReg, --RegsNeeded) {
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--CurReg) {
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if (!IsPop) {
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// Pushing any register is completely harmless, mark the
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// register involved as undef since we don't care about it in
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// the slightest.
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RegList.push_back(MachineOperand::CreateReg(CurReg, false, false,
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false, false, true));
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--RegsNeeded;
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continue;
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}
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// However, we can only pop an extra register if it's not live. Otherwise we
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// might clobber a return value register. We assume that once we find a live
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// return register all lower ones will be too so there's no use proceeding.
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if (MBB->computeRegisterLiveness(TRI, CurReg, MI) !=
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MachineBasicBlock::LQR_Dead)
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return false;
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// However, we can only pop an extra register if it's not live. For
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// registers live within the function we might clobber a return value
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// register; the other way a register can be live here is if it's
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// callee-saved.
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if (isCalleeSavedRegister(CurReg, CSRegs) ||
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MBB->computeRegisterLiveness(TRI, CurReg, MI) !=
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MachineBasicBlock::LQR_Dead) {
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// VFP pops don't allow holes in the register list, so any skip is fatal
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// for our transformation. GPR pops do, so we should just keep looking.
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if (IsVFPPushPop)
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return false;
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else
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continue;
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}
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// Mark the unimportant registers as <def,dead> in the POP.
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RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false,
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true));
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--RegsNeeded;
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}
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if (RegsNeeded > 0)
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@ -72,6 +72,14 @@ static inline bool isARMArea3Register(unsigned Reg, bool isIOS) {
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}
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}
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static inline bool isCalleeSavedRegister(unsigned Reg,
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const MCPhysReg *CSRegs) {
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for (unsigned i = 0; CSRegs[i]; ++i)
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if (Reg == CSRegs[i])
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return true;
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return false;
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}
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class ARMBaseRegisterInfo : public ARMGenRegisterInfo {
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protected:
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const ARMSubtarget &STI;
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@ -82,13 +82,6 @@ ARMFrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const {
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return hasReservedCallFrame(MF) || MF.getFrameInfo()->hasVarSizedObjects();
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}
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static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) {
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for (unsigned i = 0; CSRegs[i]; ++i)
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if (Reg == CSRegs[i])
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return true;
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return false;
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}
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static bool isCSRestore(MachineInstr *MI,
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const ARMBaseInstrInfo &TII,
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const uint16_t *CSRegs) {
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@ -215,13 +215,6 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
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AFI->setShouldRestoreSPFromFP(true);
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}
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static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) {
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for (unsigned i = 0; CSRegs[i]; ++i)
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if (Reg == CSRegs[i])
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return true;
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return false;
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}
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static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) {
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if (MI->getOpcode() == ARM::tLDRspi &&
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MI->getOperand(1).isFI() &&
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@ -15,7 +15,7 @@ define void @check_simple() minsize {
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; CHECK-NOT: sub sp, sp,
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; ...
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; CHECK-NOT: add sp, sp,
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; CHECK: pop.w {r7, r8, r9, r10, r11, pc}
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; CHECK: pop.w {r0, r1, r2, r3, r11, pc}
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; CHECK-T1-LABEL: check_simple:
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; CHECK-T1: push {r3, r4, r5, r6, r7, lr}
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@ -23,7 +23,7 @@ define void @check_simple() minsize {
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; CHECK-T1-NOT: sub sp, sp,
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; ...
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; CHECK-T1-NOT: add sp, sp,
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; CHECK-T1: pop {r3, r4, r5, r6, r7, pc}
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; CHECK-T1: pop {r0, r1, r2, r3, r7, pc}
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; iOS always has a frame pointer and messing with the push affects
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; how it's set in the prologue. Make sure we get that right.
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