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Added Thumb IT instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75198 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -66,6 +66,11 @@ def thumb_immshifted_shamt : SDNodeXForm<imm, [{
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return CurDAG->getTargetConstant(V, MVT::i32);
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return CurDAG->getTargetConstant(V, MVT::i32);
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}]>;
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}]>;
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// IT block condition mask
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def it_mask : Operand<i32> {
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let PrintMethod = "printThumbITMask";
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}
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// Define Thumb specific addressing modes.
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// Define Thumb specific addressing modes.
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// t_addrmode_rr := reg + reg
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// t_addrmode_rr := reg + reg
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@ -207,6 +212,10 @@ let isBranch = 1, isTerminator = 1 in
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def tBcc : T1I<(outs), (ins brtarget:$target, pred:$cc), "b$cc $target",
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def tBcc : T1I<(outs), (ins brtarget:$target, pred:$cc), "b$cc $target",
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[/*(ARMbrcond bb:$target, imm:$cc)*/]>;
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[/*(ARMbrcond bb:$target, imm:$cc)*/]>;
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// IT block
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def tIT : TI<(outs), (ins pred:$cc, it_mask:$mask),
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"it$mask $cc", []>;
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Load Store Instructions.
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// Load Store Instructions.
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//
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//
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@ -111,6 +111,7 @@ namespace {
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const char *Modifier = 0);
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const char *Modifier = 0);
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void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
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void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
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void printThumbITMask(const MachineInstr *MI, int OpNum);
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void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
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void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
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void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
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void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
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unsigned Scale);
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unsigned Scale);
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@ -635,6 +636,21 @@ ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
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//===--------------------------------------------------------------------===//
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//===--------------------------------------------------------------------===//
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void
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ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) {
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// (3 - the number of trailing zeros) is the number of then / else.
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unsigned Mask = MI->getOperand(Op).getImm();
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unsigned NumTZ = CountTrailingZeros_32(Mask);
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assert(NumTZ <= 3 && "Invalid IT mask!");
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for (unsigned Pos = 3, e = NumTZ; Pos >= e; --Pos) {
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bool T = (Mask & (1 << Pos)) != 0;
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if (T)
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O << 't';
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else
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O << 'e';
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}
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}
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void
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void
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ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
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ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
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const MachineOperand &MO1 = MI->getOperand(Op);
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const MachineOperand &MO1 = MI->getOperand(Op);
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