diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 0c8480d9ef2..7c42342229a 100644
--- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -1109,20 +1109,11 @@ bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI,
   case ARMII::AddrMode3:
     NumBits = 8;
     break;
-  case ARMII::AddrModeT1_s: {
-    const MachineBasicBlock &MBB = *MI->getParent();
-    const MachineFunction &MF = *MBB.getParent();
-    unsigned FrameReg = ARM::SP;
-    if (MF.getFrameInfo()->hasVarSizedObjects())
-      // There are alloca()'s in this function, must reference off the frame
-      // pointer or base pointer instead.
-      FrameReg = (!hasBasePointer(MF) ?BasePtr : getFrameRegister(MF));
-
-    NumBits = (FrameReg == ARM::SP) ? 8 : 5;
+  case ARMII::AddrModeT1_s:
+    NumBits = 5;
     Scale = 4;
     isSigned = false;
     break;
-  }
   default:
     llvm_unreachable("Unsupported addressing mode!");
     break;
diff --git a/test/CodeGen/Thumb/vargs.ll b/test/CodeGen/Thumb/vargs.ll
index 16a9c4442d8..c2ba208e4ae 100644
--- a/test/CodeGen/Thumb/vargs.ll
+++ b/test/CodeGen/Thumb/vargs.ll
@@ -1,5 +1,5 @@
 ; RUN: llc < %s -march=thumb
-; RUN: llc < %s -mtriple=thumb-linux | grep pop | count 1
+; RUN: llc < %s -mtriple=thumb-linux | grep pop | count 2
 ; RUN: llc < %s -mtriple=thumb-darwin | grep pop | count 2
 
 @str = internal constant [4 x i8] c"%d\0A\00"           ; <[4 x i8]*> [#uses=1]