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R600: Add AR_X to the R600_TReg_X register class.

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NOTE: This is a candidate for the Mesa stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175519 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2013-02-19 15:22:47 +00:00
parent 2b4b68d936
commit e5839d0fc9
1 changed files with 1 additions and 1 deletions
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2
lib/Target/R600/R600RegisterInfo.td
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@ -81,7 +81,7 @@ def R600_Addr : RegisterClass <"AMDGPU", [i32], 127, (add (sequence "Addr%u_X",
} // End isAllocatable = 0
def R600_TReg32_X : RegisterClass <"AMDGPU", [f32, i32], 32,
(add (sequence "T%u_X", 0, 127))>;
(add (sequence "T%u_X", 0, 127), AR_X)>;
def R600_TReg32_Y : RegisterClass <"AMDGPU", [f32, i32], 32,
(add (sequence "T%u_Y", 0, 127))>;