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https://github.com/c64scene-ar/llvm-6502.git
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implement FUITOS and FUITOD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30803 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -49,6 +49,8 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
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setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
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setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
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setOperationAction(ISD::RET, MVT::Other, Custom);
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setOperationAction(ISD::RET, MVT::Other, Custom);
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setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
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setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
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setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
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setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
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@ -88,6 +90,10 @@ namespace llvm {
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FSITOD,
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FSITOD,
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FUITOS,
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FUITOD,
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FMRRD,
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FMRRD,
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FMDRR
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FMDRR
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@ -124,6 +130,8 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
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case ARMISD::BR: return "ARMISD::BR";
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case ARMISD::BR: return "ARMISD::BR";
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case ARMISD::FSITOS: return "ARMISD::FSITOS";
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case ARMISD::FSITOS: return "ARMISD::FSITOS";
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case ARMISD::FSITOD: return "ARMISD::FSITOD";
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case ARMISD::FSITOD: return "ARMISD::FSITOD";
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case ARMISD::FUITOS: return "ARMISD::FUITOS";
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case ARMISD::FUITOD: return "ARMISD::FUITOD";
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case ARMISD::FMRRD: return "ARMISD::FMRRD";
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case ARMISD::FMRRD: return "ARMISD::FMRRD";
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case ARMISD::FMDRR: return "ARMISD::FMDRR";
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case ARMISD::FMDRR: return "ARMISD::FMDRR";
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}
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}
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@ -545,6 +553,18 @@ static SDOperand LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
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return DAG.getNode(op, vt, Tmp);
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return DAG.getNode(op, vt, Tmp);
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}
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}
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static SDOperand LowerUINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
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SDOperand IntVal = Op.getOperand(0);
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assert(IntVal.getValueType() == MVT::i32);
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MVT::ValueType vt = Op.getValueType();
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assert(vt == MVT::f32 ||
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vt == MVT::f64);
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SDOperand Tmp = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, IntVal);
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ARMISD::NodeType op = vt == MVT::f32 ? ARMISD::FUITOS : ARMISD::FUITOD;
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return DAG.getNode(op, vt, Tmp);
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}
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SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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switch (Op.getOpcode()) {
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switch (Op.getOpcode()) {
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default:
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default:
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@ -556,6 +576,8 @@ SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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return LowerGlobalAddress(Op, DAG);
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return LowerGlobalAddress(Op, DAG);
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case ISD::SINT_TO_FP:
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case ISD::SINT_TO_FP:
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return LowerSINT_TO_FP(Op, DAG);
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return LowerSINT_TO_FP(Op, DAG);
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case ISD::UINT_TO_FP:
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return LowerUINT_TO_FP(Op, DAG);
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case ISD::FORMAL_ARGUMENTS:
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case ISD::FORMAL_ARGUMENTS:
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return LowerFORMAL_ARGUMENTS(Op, DAG, VarArgsFrameIndex);
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return LowerFORMAL_ARGUMENTS(Op, DAG, VarArgsFrameIndex);
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case ISD::CALL:
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case ISD::CALL:
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@ -74,8 +74,10 @@ def armbr : SDNode<"ARMISD::BR", SDTarmbr, [SDNPHasChain, SDNPInFlag]>;
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def SDTVoidBinOp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
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def SDTVoidBinOp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
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def armcmp : SDNode<"ARMISD::CMP", SDTVoidBinOp, [SDNPOutFlag]>;
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def armcmp : SDNode<"ARMISD::CMP", SDTVoidBinOp, [SDNPOutFlag]>;
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def armfsitos : SDNode<"ARMISD::FSITOS", SDTUnaryOp>;
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def armfsitos : SDNode<"ARMISD::FSITOS", SDTUnaryOp>;
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def armfsitod : SDNode<"ARMISD::FSITOD", SDTUnaryOp>;
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def armfsitod : SDNode<"ARMISD::FSITOD", SDTUnaryOp>;
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def armfuitos : SDNode<"ARMISD::FUITOS", SDTUnaryOp>;
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def armfuitod : SDNode<"ARMISD::FUITOD", SDTUnaryOp>;
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def SDTarmfmrrd : SDTypeProfile<0, 3, [SDTCisInt<0>, SDTCisInt<1>, SDTCisFP<2>]>;
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def SDTarmfmrrd : SDTypeProfile<0, 3, [SDTCisInt<0>, SDTCisInt<1>, SDTCisFP<2>]>;
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def armfmrrd : SDNode<"ARMISD::FMRRD", SDTarmfmrrd,
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def armfmrrd : SDNode<"ARMISD::FMRRD", SDTarmfmrrd,
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@ -184,6 +186,12 @@ def FSITOS : InstARM<(ops FPRegs:$dst, FPRegs:$src),
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def FSITOD : InstARM<(ops DFPRegs:$dst, FPRegs:$src),
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def FSITOD : InstARM<(ops DFPRegs:$dst, FPRegs:$src),
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"fsitod $dst, $src", [(set DFPRegs:$dst, (armfsitod FPRegs:$src))]>;
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"fsitod $dst, $src", [(set DFPRegs:$dst, (armfsitod FPRegs:$src))]>;
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def FUITOS : InstARM<(ops FPRegs:$dst, FPRegs:$src),
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"fuitos $dst, $src", [(set FPRegs:$dst, (armfuitos FPRegs:$src))]>;
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def FUITOD : InstARM<(ops DFPRegs:$dst, FPRegs:$src),
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"fuitod $dst, $src", [(set DFPRegs:$dst, (armfuitod FPRegs:$src))]>;
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// Floating Point Arithmetic
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// Floating Point Arithmetic
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def FADDS : InstARM<(ops FPRegs:$dst, FPRegs:$a, FPRegs:$b),
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def FADDS : InstARM<(ops FPRegs:$dst, FPRegs:$a, FPRegs:$b),
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@ -1,12 +1,14 @@
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; RUN: llvm-as < %s | llc -march=arm &&
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; RUN: llvm-as < %s | llc -march=arm &&
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; RUN: llvm-as < %s | llc -march=arm | grep fmsr | wc -l | grep 2 &&
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; RUN: llvm-as < %s | llc -march=arm | grep fmsr | wc -l | grep 4 &&
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; RUN: llvm-as < %s | llc -march=arm | grep fsitos &&
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; RUN: llvm-as < %s | llc -march=arm | grep fsitos &&
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; RUN: llvm-as < %s | llc -march=arm | grep fmrs &&
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; RUN: llvm-as < %s | llc -march=arm | grep fmrs &&
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; RUN: llvm-as < %s | llc -march=arm | grep fsitod &&
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; RUN: llvm-as < %s | llc -march=arm | grep fsitod &&
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; RUN: llvm-as < %s | llc -march=arm | grep fmrrd | wc -l | grep 4 &&
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; RUN: llvm-as < %s | llc -march=arm | grep fmrrd | wc -l | grep 5 &&
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; RUN: llvm-as < %s | llc -march=arm | grep fmdrr | wc -l | grep 2 &&
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; RUN: llvm-as < %s | llc -march=arm | grep fmdrr | wc -l | grep 2 &&
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; RUN: llvm-as < %s | llc -march=arm | grep fldd &&
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; RUN: llvm-as < %s | llc -march=arm | grep fldd &&
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; RUN: llvm-as < %s | llc -march=arm | grep flds &&
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; RUN: llvm-as < %s | llc -march=arm | grep flds &&
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; RUN: llvm-as < %s | llc -march=arm | grep fuitod &&
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; RUN: llvm-as < %s | llc -march=arm | grep fuitos &&
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; RUN: llvm-as < %s | llc -march=arm | grep ".word.*1065353216"
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; RUN: llvm-as < %s | llc -march=arm | grep ".word.*1065353216"
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float %f(int %a) {
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float %f(int %a) {
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@ -21,6 +23,19 @@ entry:
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ret double %tmp
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ret double %tmp
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}
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}
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double %uint_to_double(uint %a) {
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entry:
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%tmp = cast uint %a to double
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ret double %tmp
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}
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float %uint_to_float(uint %a) {
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entry:
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%tmp = cast uint %a to float
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ret float %tmp
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}
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double %h(double* %v) {
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double %h(double* %v) {
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entry:
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entry:
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%tmp = load double* %v ; <double> [#uses=1]
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%tmp = load double* %v ; <double> [#uses=1]
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