Move Sched::Preference out of TargetMachine.h where it is not referenced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148014 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2012-01-12 02:35:23 +00:00
parent c59d9df248
commit e5dafc3956
3 changed files with 10 additions and 10 deletions

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@ -16,7 +16,7 @@
#define LLVM_CODEGEN_SCHEDULEDAG_H #define LLVM_CODEGEN_SCHEDULEDAG_H
#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetLowering.h"
#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/BitVector.h" #include "llvm/ADT/BitVector.h"
#include "llvm/ADT/GraphTraits.h" #include "llvm/ADT/GraphTraits.h"

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@ -53,6 +53,15 @@ namespace llvm {
class TargetLoweringObjectFile; class TargetLoweringObjectFile;
class Value; class Value;
namespace Sched {
enum Preference {
None, // No preference
RegPressure, // Scheduling for lowest register pressure.
Hybrid, // Scheduling for both latency and register pressure.
ILP // Scheduling for ILP in low register pressure mode.
};
}
// FIXME: should this be here? // FIXME: should this be here?
namespace TLSModel { namespace TLSModel {
enum Model { enum Model {

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@ -44,15 +44,6 @@ class TargetSubtargetInfo;
class formatted_raw_ostream; class formatted_raw_ostream;
class raw_ostream; class raw_ostream;
namespace Sched {
enum Preference {
None, // No preference
RegPressure, // Scheduling for lowest register pressure.
Hybrid, // Scheduling for both latency and register pressure.
ILP // Scheduling for ILP in low register pressure mode.
};
}
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
/// ///
/// TargetMachine - Primary interface to the complete machine description for /// TargetMachine - Primary interface to the complete machine description for