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[NVPTX] Associate a minimum PTX version for each SM architecture
When a new SM architecture is introduced, it is only supported by the current PTX version and later. Make sure we are using at least the minimum PTX version for the target architecture. This also removes support for PTX ISA < 3.2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233583 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -46,10 +46,6 @@ def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53",
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"Target SM 5.3">;
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"Target SM 5.3">;
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// PTX Versions
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// PTX Versions
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def PTX30 : SubtargetFeature<"ptx30", "PTXVersion", "30",
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"Use PTX version 3.0">;
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def PTX31 : SubtargetFeature<"ptx31", "PTXVersion", "31",
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"Use PTX version 3.1">;
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def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
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def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
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"Use PTX version 3.2">;
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"Use PTX version 3.2">;
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def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
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def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
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@ -69,12 +65,12 @@ class Proc<string Name, list<SubtargetFeature> Features>
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def : Proc<"sm_20", [SM20]>;
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def : Proc<"sm_20", [SM20]>;
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def : Proc<"sm_21", [SM21]>;
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def : Proc<"sm_21", [SM21]>;
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def : Proc<"sm_30", [SM30]>;
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def : Proc<"sm_30", [SM30]>;
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def : Proc<"sm_32", [SM32]>;
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def : Proc<"sm_32", [SM32, PTX40]>;
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def : Proc<"sm_35", [SM35]>;
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def : Proc<"sm_35", [SM35]>;
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def : Proc<"sm_37", [SM37]>;
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def : Proc<"sm_37", [SM37, PTX41]>;
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def : Proc<"sm_50", [SM50]>;
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def : Proc<"sm_50", [SM50, PTX40]>;
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def : Proc<"sm_52", [SM52]>;
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def : Proc<"sm_52", [SM52, PTX41]>;
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def : Proc<"sm_53", [SM53]>;
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def : Proc<"sm_53", [SM53, PTX42]>;
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def NVPTXInstrInfo : InstrInfo {
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def NVPTXInstrInfo : InstrInfo {
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@ -1,6 +0,0 @@
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 -mattr=ptx30 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -mattr=ptx30 | FileCheck %s
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; CHECK: .version 3.0
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@ -1,6 +0,0 @@
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 -mattr=ptx31 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -mattr=ptx31 | FileCheck %s
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; CHECK: .version 3.1
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@ -2,5 +2,6 @@
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s
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; CHECK: .version 3.2
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; CHECK: .target sm_30
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; CHECK: .target sm_30
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@ -2,5 +2,6 @@
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_32 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_32 | FileCheck %s
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; CHECK: .version 4.0
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; CHECK: .target sm_32
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; CHECK: .target sm_32
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@ -2,5 +2,6 @@
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s
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; CHECK: .version 3.2
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; CHECK: .target sm_35
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; CHECK: .target sm_35
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@ -2,5 +2,6 @@
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_37 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_37 | FileCheck %s
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; CHECK: .version 4.1
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; CHECK: .target sm_37
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; CHECK: .target sm_37
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7
test/CodeGen/NVPTX/sm-version-50.ll
Normal file
7
test/CodeGen/NVPTX/sm-version-50.ll
Normal file
@ -0,0 +1,7 @@
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; RUN: llc < %s -march=nvptx -mcpu=sm_50 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_50 | FileCheck %s
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; CHECK: .version 4.0
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; CHECK: .target sm_50
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@ -2,5 +2,6 @@
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_52 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_52 | FileCheck %s
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; CHECK: .version 4.1
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; CHECK: .target sm_52
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; CHECK: .target sm_52
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@ -2,5 +2,6 @@
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_53 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_53 | FileCheck %s
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; CHECK: .version 4.2
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; CHECK: .target sm_53
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; CHECK: .target sm_53
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