name change requested by review of previous patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37289 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dale Johannesen 2007-05-22 18:31:04 +00:00
parent 2b77d3b091
commit e6e435498c
4 changed files with 8 additions and 8 deletions

View File

@ -185,9 +185,9 @@ public:
AssemblyFile, ObjectFile, DynamicLibrary AssemblyFile, ObjectFile, DynamicLibrary
}; };
/// DoTailMergeDefault - Whether it is generally a good idea to do this /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
/// on this target. User flag overrides. /// on this target. User flag overrides.
virtual const bool DoTailMergeDefault() const { return true; } virtual const bool getEnableTailMergeDefault() const { return true; }
/// addPassesToEmitFile - Add passes to the specified pass manager to get the /// addPassesToEmitFile - Add passes to the specified pass manager to get the
/// specified file emitted. Typically this will involve several steps of code /// specified file emitted. Typically this will involve several steps of code
@ -320,9 +320,9 @@ public:
return true; return true;
} }
/// DoTailMergeDefault - Whether it is generally a good idea to do this /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
/// on this target. User flag overrides. /// on this target. User flag overrides.
virtual const bool DoTailMergeDefault() const { return true; } virtual const bool getEnableTailMergeDefault() const { return true; }
}; };
} // End llvm namespace } // End llvm namespace

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@ -78,7 +78,7 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
// Branch folding must be run after regalloc and prolog/epilog insertion. // Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast) if (!Fast)
PM.add(createBranchFoldingPass(DoTailMergeDefault())); PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
// Fold redundant debug labels. // Fold redundant debug labels.
PM.add(createDebugLabelFoldingPass()); PM.add(createDebugLabelFoldingPass());
@ -181,7 +181,7 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
// Branch folding must be run after regalloc and prolog/epilog insertion. // Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast) if (!Fast)
PM.add(createBranchFoldingPass(DoTailMergeDefault())); PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
if (addPreEmitPass(PM, Fast) && PrintMachineCode) if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr)); PM.add(createMachineFunctionPrinterPass(cerr));

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@ -98,7 +98,7 @@ PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
/// Override this for PowerPC. Tail merging happily breaks up instruction issue /// Override this for PowerPC. Tail merging happily breaks up instruction issue
/// groups, which typically degrades performance. /// groups, which typically degrades performance.
const bool PPCTargetMachine::DoTailMergeDefault() const { return false; } const bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS) PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS)
: PPCTargetMachine(M, FS, false) { : PPCTargetMachine(M, FS, false) {

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@ -73,7 +73,7 @@ public:
MachineCodeEmitter &MCE); MachineCodeEmitter &MCE);
virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast, virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
MachineCodeEmitter &MCE); MachineCodeEmitter &MCE);
virtual const bool DoTailMergeDefault() const; virtual const bool getEnableTailMergeDefault() const;
}; };
/// PPC32TargetMachine - PowerPC 32-bit target machine. /// PPC32TargetMachine - PowerPC 32-bit target machine.