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Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed.
e.g. %reg1024<def> = MOV r1 %reg1025<def> = ADD %reg1024, %reg1026 r0 = MOV %reg1025 If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68065 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -96,6 +96,13 @@ namespace {
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MachineFunction::iterator &mbbi,
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unsigned RegB, unsigned RegC, unsigned Dist);
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bool isProfitableToConv3Addr(unsigned RegA);
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bool ConvertInstTo3Addr(MachineBasicBlock::iterator &mi,
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MachineBasicBlock::iterator &nmi,
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MachineFunction::iterator &mbbi,
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unsigned RegB, unsigned Dist);
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void ProcessCopy(MachineInstr *MI, MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &Processed);
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public:
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@ -334,7 +341,9 @@ static bool isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII,
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/// as a two-address use. If so, return the destination register by reference.
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static bool isTwoAddrUse(MachineInstr &MI, unsigned Reg, unsigned &DstReg) {
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const TargetInstrDesc &TID = MI.getDesc();
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for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
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unsigned NumOps = (MI.getOpcode() == TargetInstrInfo::INLINEASM)
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? MI.getNumOperands() : TID.getNumOperands();
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for (unsigned i = 0; i != NumOps; ++i) {
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const MachineOperand &MO = MI.getOperand(i);
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if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg)
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continue;
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@ -503,6 +512,53 @@ TwoAddressInstructionPass::CommuteInstruction(MachineBasicBlock::iterator &mi,
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return true;
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}
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/// isProfitableToConv3Addr - Return true if it is profitable to convert the
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/// given 2-address instruction to a 3-address one.
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bool
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TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA) {
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// Look for situations like this:
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// %reg1024<def> = MOV r1
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// %reg1025<def> = MOV r0
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// %reg1026<def> = ADD %reg1024, %reg1025
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// r2 = MOV %reg1026
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// Turn ADD into a 3-address instruction to avoid a copy.
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unsigned FromRegA = getMappedReg(RegA, SrcRegMap);
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unsigned ToRegA = getMappedReg(RegA, DstRegMap);
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return (FromRegA && ToRegA && !regsAreCompatible(FromRegA, ToRegA, TRI));
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}
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/// ConvertInstTo3Addr - Convert the specified two-address instruction into a
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/// three address one. Return true if this transformation was successful.
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bool
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TwoAddressInstructionPass::ConvertInstTo3Addr(MachineBasicBlock::iterator &mi,
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MachineBasicBlock::iterator &nmi,
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MachineFunction::iterator &mbbi,
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unsigned RegB, unsigned Dist) {
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MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV);
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if (NewMI) {
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DOUT << "2addr: CONVERTING 2-ADDR: " << *mi;
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DOUT << "2addr: TO 3-ADDR: " << *NewMI;
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bool Sunk = false;
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if (NewMI->findRegisterUseOperand(RegB, false, TRI))
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// FIXME: Temporary workaround. If the new instruction doesn't
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// uses RegB, convertToThreeAddress must have created more
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// then one instruction.
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Sunk = Sink3AddrInstruction(mbbi, NewMI, RegB, mi);
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mbbi->erase(mi); // Nuke the old inst.
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if (!Sunk) {
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DistanceMap.insert(std::make_pair(NewMI, Dist));
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mi = NewMI;
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nmi = next(mi);
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}
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return true;
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}
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return false;
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}
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/// ProcessCopy - If the specified instruction is not yet processed, process it
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/// if it's a copy. For a copy instruction, we find the physical registers the
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/// source and destination registers might be mapped to. These are kept in
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@ -716,26 +772,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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assert(TID.getOperandConstraint(i, TOI::TIED_TO) == -1);
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#endif
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MachineInstr *NewMI = TII->convertToThreeAddress(mbbi, mi, LV);
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if (NewMI) {
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DOUT << "2addr: CONVERTING 2-ADDR: " << *mi;
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DOUT << "2addr: TO 3-ADDR: " << *NewMI;
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bool Sunk = false;
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if (NewMI->findRegisterUseOperand(regB, false, TRI))
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// FIXME: Temporary workaround. If the new instruction doesn't
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// uses regB, convertToThreeAddress must have created more
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// then one instruction.
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Sunk = Sink3AddrInstruction(mbbi, NewMI, regB, mi);
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mbbi->erase(mi); // Nuke the old inst.
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if (!Sunk) {
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DistanceMap.insert(std::make_pair(NewMI, Dist));
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mi = NewMI;
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nmi = next(mi);
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}
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if (ConvertInstTo3Addr(mi, nmi, mbbi, regB, Dist)) {
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++NumConvertedTo3Addr;
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break; // Done with this instruction.
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}
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@ -750,9 +787,19 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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++NumAggrCommuted;
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++NumCommuted;
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regB = regC;
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goto InstructionRearranged;
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}
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}
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// If it's profitable to convert the 2-address instruction to a
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// 3-address one, do so.
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if (TID.isConvertibleTo3Addr() && isProfitableToConv3Addr(regA)) {
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if (ConvertInstTo3Addr(mi, nmi, mbbi, regB, Dist)) {
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++NumConvertedTo3Addr;
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break; // Done with this instruction.
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}
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}
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InstructionRearranged:
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const TargetRegisterClass* rc = MRI->getRegClass(regB);
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MachineInstr *DefMI = MRI->getVRegDef(regB);
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@ -1,4 +1,4 @@
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; RUN: llvm-as < %s | llc -march=x86-64 | grep movq | count 1
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; RUN: llvm-as < %s | llc -march=x86-64 | not grep movq
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define i64 @t(i64 %a, i64 %b) nounwind ssp {
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entry:
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