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ARM Assembler support for DSB instruction.

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Add instalias for default 'sy' option. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135116 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-07-14 00:18:13 +00:00
parent c66a37df73
commit e77494e3e3
2 changed files with 33 additions and 0 deletions
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2
lib/Target/ARM/ARMInstrInfo.td
View File

@ -3314,6 +3314,8 @@ def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
let Inst{3-0} = opt;
}
def : InstAlias<"dsb", (DSB 0xf)>, Requires<[IsARM, HasDB]>;
// ISB has only full system option
def ISB : AInoP<(outs), (ins), MiscFrm, NoItinerary, "isb", "", []>,
Requires<[IsARM, HasDB]> {

31
test/MC/ARM/basic-arm-instructions.s
View File

@ -490,3 +490,34 @@ _func:
@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5]
@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5]
@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
@------------------------------------------------------------------------------
@ DSB
@------------------------------------------------------------------------------
dsb sy
dsb st
dsb sh
dsb ish
dsb shst
dsb ishst
dsb un
dsb nsh
dsb unst
dsb nshst
dsb osh
dsb oshst
dsb
@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5]
@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5]
@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5]
@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5]
@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5]
@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]