mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-03-04 21:31:03 +00:00
implement the vsldoi intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27139 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
7344e1128a
commit
e7d959c069
@ -71,13 +71,13 @@ let isLoad = 1, PPC970_Unit = 2 in { // Loads.
|
||||
def LVEBX: XForm_1<31, 7, (ops VRRC:$vD, memrr:$src),
|
||||
"lvebx $vD, $src", LdStGeneral,
|
||||
[(set VRRC:$vD, (v16i8 (PPClve_x xoaddr:$src)))]>;
|
||||
def LVEHX: XForm_1<31, 39, (ops VRRC:$vD, memrr:$src),
|
||||
def LVEHX: XForm_1<31, 39, (ops VRRC:$vD, memrr:$src),
|
||||
"lvehx $vD, $src", LdStGeneral,
|
||||
[(set VRRC:$vD, (v8i16 (PPClve_x xoaddr:$src)))]>;
|
||||
def LVEWX: XForm_1<31, 71, (ops VRRC:$vD, memrr:$src),
|
||||
def LVEWX: XForm_1<31, 71, (ops VRRC:$vD, memrr:$src),
|
||||
"lvewx $vD, $src", LdStGeneral,
|
||||
[(set VRRC:$vD, (v4f32 (PPClve_x xoaddr:$src)))]>;
|
||||
def LVX : XForm_1<31, 103, (ops VRRC:$vD, memrr:$src),
|
||||
def LVX : XForm_1<31, 103, (ops VRRC:$vD, memrr:$src),
|
||||
"lvx $vD, $src", LdStGeneral,
|
||||
[(set VRRC:$vD, (v4f32 (load xoaddr:$src)))]>;
|
||||
}
|
||||
@ -121,7 +121,11 @@ def VPERM : VAForm_1<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vC, VRRC:$vB),
|
||||
"vperm $vD, $vA, $vB, $vC", VecPerm,
|
||||
[(set VRRC:$vD,
|
||||
(PPCvperm (v4f32 VRRC:$vA), VRRC:$vB, VRRC:$vC))]>;
|
||||
|
||||
def VSLDOI : VAForm_2<44, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, u5imm:$SH),
|
||||
"vsldoi $vD, $vA, $vB, $SH", VecFP,
|
||||
[(set VRRC:$vD,
|
||||
(int_ppc_altivec_vsldoi VRRC:$vA, VRRC:$vB,
|
||||
imm:$SH))]>;
|
||||
|
||||
// VX-Form instructions. AltiVec arithmetic ops.
|
||||
def VADDCUW : VXForm_1<384, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB),
|
||||
|
@ -607,6 +607,24 @@ class VAForm_1<bits<6> xo, dag OL, string asmstr,
|
||||
let Inst{26-31} = xo;
|
||||
}
|
||||
|
||||
class VAForm_2<bits<6> xo, dag OL, string asmstr,
|
||||
InstrItinClass itin, list<dag> pattern>
|
||||
: I<4, OL, asmstr, itin> {
|
||||
bits<5> VD;
|
||||
bits<5> VA;
|
||||
bits<5> VB;
|
||||
bits<4> SH;
|
||||
|
||||
let Pattern = pattern;
|
||||
|
||||
let Inst{6-10} = VD;
|
||||
let Inst{11-15} = VA;
|
||||
let Inst{16-20} = VB;
|
||||
let Inst{21} = 0;
|
||||
let Inst{22-25} = SH;
|
||||
let Inst{26-31} = xo;
|
||||
}
|
||||
|
||||
// E-2 VX-Form
|
||||
class VXForm_1<bits<11> xo, dag OL, string asmstr,
|
||||
InstrItinClass itin, list<dag> pattern>
|
||||
|
Loading…
x
Reference in New Issue
Block a user