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Skeleton of post-RA scheduler; doesn't do anything yet.

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Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39816 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dale Johannesen
2007-07-13 17:13:54 +00:00
parent 8dc4b59b85
commit e7e7d0d7e3
11 changed files with 106 additions and 16 deletions
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6
lib/CodeGen/LLVMTargetMachine.cpp
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@ -78,6 +78,9 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
// Second pass scheduler.
PM.add(createPostRAScheduler());
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
@ -181,6 +184,9 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
if (PrintMachineCode) // Print the register-allocated code
PM.add(createMachineFunctionPrinterPass(cerr));
// Second pass scheduler.
PM.add(createPostRAScheduler());
// Branch folding must be run after regalloc and prolog/epilog insertion.
if (!Fast)
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));