From e7f28b2bb0f58a28808822763cb81d4182e9ded2 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Sun, 11 Jan 2015 10:34:52 +0000 Subject: [PATCH] Added release notes for the Mips target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225607 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/ReleaseNotes.rst | 69 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst index 56e93889858..5f40a2c453c 100644 --- a/docs/ReleaseNotes.rst +++ b/docs/ReleaseNotes.rst @@ -111,7 +111,74 @@ Changes to the ARM Backend Changes to the MIPS Target -------------------------- -During this release ... +During this release the MIPS target has reached a few major milestones. It has +gained support for MIPS-II and MIPS-III, become ABI-compatible with GCC for big +and little endian O32, N32, and N64, and we are now able to compile the Linux +kernel for 32-bit targets. + +ABI +^^^ + +A large number of bugs have been fixed for big-endian MIPS targets using the +N32 and N64 ABI's as well as a small number of bugs affecting other ABI's. +Please note that some of these bugs will still affect LLVM-IR generated by +LLVM 3.5 since correct code generation depends on appropriate usage of the +``inreg``, ``signext``, and ``zeroext`` attributes on all function arguments +and returns. + +There are far too many corrections to provide a complete list but here are a +few notable ones: + +* Big-endian N32 and N64 now interlinks successfully with GCC compiled code. + Previously this didn't work for the majority of cases. + +* The registers used to return a structure containing a single 128-bit floating + point member on the N32/N64 ABI's have been changed from those specified by + the ABI documentation to match those used by GCC. The documentation specifies + that ``$f0`` and ``$f2`` should be used but GCC has used ``$f0`` and ``$f1`` + for many years. + +* Returning a zero-byte struct no longer causes arguments to be read from the + wrong registers when using the O32 ABI. + +* The exception personality has been changed for 64-bit MIPS targets to + eliminate warnings about relocations in a read-only section. + +* Incorrect usage of odd-numbered single-precision floating point registers + has been fixed when the fastcc calling convention is used with 64-bit FPU's + and -mno-odd-spreg. + +LLVMLinux +^^^^^^^^^ + +It is now possible to compile the Linux kernel. This currently requires a small +number of kernel patches. See the `LLVMLinux project +`_ for details. + +* Added -mabicalls and -mno-abicalls. The implementation may not be complete + but works sufficiently well for the Linux kernel. + +* Fixed multiple compatibility issues between LLVM's inline assembly support + and GCC's. + +* Added support for a number of directives used by Linux to the Integrated + Assembler. + +Miscellaneous +^^^^^^^^^^^^^ + +* Attempting to disassemble l[wd]c[23], s[wd]c[23], cache, and pref no longer + triggers an assertion. + +* Added -muclibc and -mglibc to support toolchains that provide both uClibC and + GLibC. + +* __SIZEOF_INT128__ is no longer defined for 64-bit targets since 128-bit + integers do not work at this time for this target. + +* Using $t4-$t7 with the N32 and N64 ABI is deprecated when ``-fintegrated-as`` + is in use and will be removed in LLVM 3.7. These names have never been + supported by the GNU Assembler for these ABI's. Changes to the PowerPC Target -----------------------------