mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 21:29:20 +00:00
Substantially improve the code generated by non-folded setcc instructions.
In particular, instead of compiling this:
bool %test(int %A, int %B) {
%C = setlt int %A, %B
ret bool %C
}
to this:
test:
save %sp, -96, %sp
subcc %i0, %i1, %g0
bl .LBBtest_1 !
nop
ba .LBBtest_2 !
nop
.LBBtest_1: !
or %g0, 1, %i0
ba .LBBtest_3 !
nop
.LBBtest_2: !
or %g0, 0, %i0
ba .LBBtest_3 !
nop
.LBBtest_3: !
restore %g0, %g0, %g0
retl
nop
We now compile it to this:
test:
save %sp, -96, %sp
subcc %i0, %i1, %g0
or %g0, 1, %i0
bl .LBBtest_2 !
nop
.LBBtest_1: !
or %g0, %g0, %i0
.LBBtest_2: !
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19213 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
13b2f764c0
commit
e7f96c515e
@ -251,7 +251,6 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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}
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if (C->getType()->isIntegral ()) {
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uint64_t Val;
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unsigned Class = getClassB (C->getType ());
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if (Class == cLong) {
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unsigned TmpReg = makeAnotherReg (Type::IntTy);
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@ -267,12 +266,13 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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}
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assert(Class <= cInt && "Type not handled yet!");
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unsigned Val;
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if (C->getType() == Type::BoolTy) {
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Val = (C == ConstantBool::True);
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} else {
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ConstantIntegral *CI = cast<ConstantIntegral> (C);
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Val = CI->getRawValue ();
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Val = CI->getRawValue();
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}
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if (C->getType()->isSigned()) {
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switch (Class) {
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@ -289,7 +289,7 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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}
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if (Val == 0) {
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BuildMI (*MBB, IP, V8::ORrr, 2, R).addReg (V8::G0).addReg(V8::G0);
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} else if (((int64_t)Val >= -4096) && ((int64_t)Val <= 4095)) {
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} else if ((int)Val >= -4096 && (int)Val <= 4095) {
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addSImm(Val);
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} else {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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@ -1639,55 +1639,42 @@ void V8ISel::visitSetCondInst(SetCondInst &I) {
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// thisMBB:
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// ...
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// subcc %reg0, %reg1, %g0
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// bCC copy1MBB
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// ba copy0MBB
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// TrueVal = or G0, 1
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// bCC sinkMBB
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unsigned TrueValue = makeAnotherReg (I.getType ());
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BuildMI (BB, V8::ORri, 2, TrueValue).addReg (V8::G0).addZImm (1);
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// FIXME: we wouldn't need copy0MBB (we could fold it into thisMBB)
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// if we could insert other, non-terminator instructions after the
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// bCC. But MBB->getFirstTerminator() can't understand this.
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MachineBasicBlock *copy1MBB = new MachineBasicBlock (LLVM_BB);
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F->getBasicBlockList ().push_back (copy1MBB);
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BuildMI (BB, Opcode, 1).addMBB (copy1MBB);
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MachineBasicBlock *copy0MBB = new MachineBasicBlock (LLVM_BB);
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F->getBasicBlockList ().push_back (copy0MBB);
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BuildMI (BB, V8::BA, 1).addMBB (copy0MBB);
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MachineBasicBlock *sinkMBB = new MachineBasicBlock (LLVM_BB);
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BuildMI (BB, Opcode, 1).addMBB (sinkMBB);
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// Update machine-CFG edges
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BB->addSuccessor (copy1MBB);
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BB->addSuccessor (sinkMBB);
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BB->addSuccessor (copy0MBB);
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// copy0MBB:
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// %FalseValue = or %G0, 0
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// ba sinkMBB
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// # fall through
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BB = copy0MBB;
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F->getBasicBlockList ().push_back (BB);
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unsigned FalseValue = makeAnotherReg (I.getType ());
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BuildMI (BB, V8::ORri, 2, FalseValue).addReg (V8::G0).addZImm (0);
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MachineBasicBlock *sinkMBB = new MachineBasicBlock (LLVM_BB);
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F->getBasicBlockList ().push_back (sinkMBB);
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BuildMI (BB, V8::BA, 1).addMBB (sinkMBB);
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BuildMI (BB, V8::ORrr, 2, FalseValue).addReg (V8::G0).addReg (V8::G0);
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// Update machine-CFG edges
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BB->addSuccessor (sinkMBB);
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DEBUG (std::cerr << "thisMBB is at " << (void*)thisMBB << "\n");
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DEBUG (std::cerr << "copy1MBB is at " << (void*)copy1MBB << "\n");
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DEBUG (std::cerr << "copy0MBB is at " << (void*)copy0MBB << "\n");
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DEBUG (std::cerr << "sinkMBB is at " << (void*)sinkMBB << "\n");
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// copy1MBB:
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// %TrueValue = or %G0, 1
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// ba sinkMBB
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BB = copy1MBB;
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unsigned TrueValue = makeAnotherReg (I.getType ());
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BuildMI (BB, V8::ORri, 2, TrueValue).addReg (V8::G0).addZImm (1);
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BuildMI (BB, V8::BA, 1).addMBB (sinkMBB);
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// Update machine-CFG edges
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BB->addSuccessor (sinkMBB);
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// sinkMBB:
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// %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, copy1MBB ]
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// %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
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// ...
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BB = sinkMBB;
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F->getBasicBlockList ().push_back (BB);
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BuildMI (BB, V8::PHI, 4, DestReg).addReg (FalseValue)
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.addMBB (copy0MBB).addReg (TrueValue).addMBB (copy1MBB);
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.addMBB (copy0MBB).addReg (TrueValue).addMBB (thisMBB);
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}
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void V8ISel::visitAllocaInst(AllocaInst &I) {
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@ -251,7 +251,6 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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}
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if (C->getType()->isIntegral ()) {
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uint64_t Val;
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unsigned Class = getClassB (C->getType ());
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if (Class == cLong) {
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unsigned TmpReg = makeAnotherReg (Type::IntTy);
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@ -267,12 +266,13 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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}
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assert(Class <= cInt && "Type not handled yet!");
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unsigned Val;
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if (C->getType() == Type::BoolTy) {
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Val = (C == ConstantBool::True);
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} else {
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ConstantIntegral *CI = cast<ConstantIntegral> (C);
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Val = CI->getRawValue ();
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Val = CI->getRawValue();
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}
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if (C->getType()->isSigned()) {
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switch (Class) {
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@ -289,7 +289,7 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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}
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if (Val == 0) {
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BuildMI (*MBB, IP, V8::ORrr, 2, R).addReg (V8::G0).addReg(V8::G0);
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} else if (((int64_t)Val >= -4096) && ((int64_t)Val <= 4095)) {
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} else if ((int)Val >= -4096 && (int)Val <= 4095) {
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BuildMI (*MBB, IP, V8::ORri, 2, R).addReg (V8::G0).addSImm(Val);
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} else {
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unsigned TmpReg = makeAnotherReg (C->getType ());
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@ -1639,55 +1639,42 @@ void V8ISel::visitSetCondInst(SetCondInst &I) {
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// thisMBB:
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// ...
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// subcc %reg0, %reg1, %g0
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// bCC copy1MBB
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// ba copy0MBB
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// TrueVal = or G0, 1
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// bCC sinkMBB
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unsigned TrueValue = makeAnotherReg (I.getType ());
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BuildMI (BB, V8::ORri, 2, TrueValue).addReg (V8::G0).addZImm (1);
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// FIXME: we wouldn't need copy0MBB (we could fold it into thisMBB)
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// if we could insert other, non-terminator instructions after the
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// bCC. But MBB->getFirstTerminator() can't understand this.
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MachineBasicBlock *copy1MBB = new MachineBasicBlock (LLVM_BB);
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F->getBasicBlockList ().push_back (copy1MBB);
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BuildMI (BB, Opcode, 1).addMBB (copy1MBB);
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MachineBasicBlock *copy0MBB = new MachineBasicBlock (LLVM_BB);
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F->getBasicBlockList ().push_back (copy0MBB);
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BuildMI (BB, V8::BA, 1).addMBB (copy0MBB);
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MachineBasicBlock *sinkMBB = new MachineBasicBlock (LLVM_BB);
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BuildMI (BB, Opcode, 1).addMBB (sinkMBB);
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// Update machine-CFG edges
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BB->addSuccessor (copy1MBB);
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BB->addSuccessor (sinkMBB);
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BB->addSuccessor (copy0MBB);
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// copy0MBB:
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// %FalseValue = or %G0, 0
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// ba sinkMBB
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// # fall through
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BB = copy0MBB;
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F->getBasicBlockList ().push_back (BB);
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unsigned FalseValue = makeAnotherReg (I.getType ());
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BuildMI (BB, V8::ORri, 2, FalseValue).addReg (V8::G0).addZImm (0);
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MachineBasicBlock *sinkMBB = new MachineBasicBlock (LLVM_BB);
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F->getBasicBlockList ().push_back (sinkMBB);
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BuildMI (BB, V8::BA, 1).addMBB (sinkMBB);
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BuildMI (BB, V8::ORrr, 2, FalseValue).addReg (V8::G0).addReg (V8::G0);
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// Update machine-CFG edges
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BB->addSuccessor (sinkMBB);
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DEBUG (std::cerr << "thisMBB is at " << (void*)thisMBB << "\n");
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DEBUG (std::cerr << "copy1MBB is at " << (void*)copy1MBB << "\n");
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DEBUG (std::cerr << "copy0MBB is at " << (void*)copy0MBB << "\n");
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DEBUG (std::cerr << "sinkMBB is at " << (void*)sinkMBB << "\n");
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// copy1MBB:
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// %TrueValue = or %G0, 1
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// ba sinkMBB
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BB = copy1MBB;
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unsigned TrueValue = makeAnotherReg (I.getType ());
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BuildMI (BB, V8::ORri, 2, TrueValue).addReg (V8::G0).addZImm (1);
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BuildMI (BB, V8::BA, 1).addMBB (sinkMBB);
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// Update machine-CFG edges
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BB->addSuccessor (sinkMBB);
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// sinkMBB:
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// %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, copy1MBB ]
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// %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
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// ...
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BB = sinkMBB;
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F->getBasicBlockList ().push_back (BB);
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BuildMI (BB, V8::PHI, 4, DestReg).addReg (FalseValue)
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.addMBB (copy0MBB).addReg (TrueValue).addMBB (copy1MBB);
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.addMBB (copy0MBB).addReg (TrueValue).addMBB (thisMBB);
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}
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void V8ISel::visitAllocaInst(AllocaInst &I) {
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