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use predicates in DBG_VALUE printing code to simplify it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100312 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -344,16 +344,17 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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O << " <- ";
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if (NOps==3) {
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// Register or immediate value. Register 0 means undef.
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assert(MI->getOperand(0).getType()==MachineOperand::MO_Register ||
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MI->getOperand(0).getType()==MachineOperand::MO_Immediate ||
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MI->getOperand(0).getType()==MachineOperand::MO_FPImmediate);
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if (MI->getOperand(0).getType()==MachineOperand::MO_Register &&
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MI->getOperand(0).getReg()==0) {
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assert(MI->getOperand(0).isReg() ||
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MI->getOperand(0).isImm() ||
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MI->getOperand(0).isFPImm());
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if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == 0) {
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// Suppress offset in this case, it is not meaningful.
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O << "undef";
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OutStreamer.AddBlankLine();
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return;
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} else if (MI->getOperand(0).getType()==MachineOperand::MO_FPImmediate) {
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}
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if (MI->getOperand(0).isFPImm()) {
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// This is more naturally done in printOperand, but since the only use
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// of such an operand is in this comment and that is temporary (and it's
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// ugly), we prefer to keep this localized.
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@ -373,16 +374,14 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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} else
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printOperand(MI, 0, O);
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} else {
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if (MI->getOperand(0).getType()==MachineOperand::MO_Register &&
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MI->getOperand(0).getReg()==0) {
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if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == 0) {
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// Suppress offset in this case, it is not meaningful.
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O << "undef";
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OutStreamer.AddBlankLine();
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return;
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}
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// Frame address. Currently handles register +- offset only.
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assert(MI->getOperand(0).getType()==MachineOperand::MO_Register);
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assert(MI->getOperand(3).getType()==MachineOperand::MO_Immediate);
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assert(MI->getOperand(0).isReg() && MI->getOperand(3).isImm());
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O << '['; printOperand(MI, 0, O); O << '+'; printOperand(MI, 3, O);
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O << ']';
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}
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