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64b: Expand S/UREM
32b: No longer pattern match fneg(fsub(fmul)) as fnmsub Pattern match fsub a, mul(b, c) as fnmsub Pattern match fadd a, mul(b, c) as fmadd Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21161 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -55,6 +55,10 @@ namespace {
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setOperationAction(ISD::SEXTLOAD, MVT::i1, Expand);
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setOperationAction(ISD::SEXTLOAD, MVT::i8, Expand);
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// PowerPC has no SREM/UREM instructions
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setOperationAction(ISD::SREM, MVT::i64, Expand);
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setOperationAction(ISD::UREM, MVT::i64, Expand);
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setShiftAmountFlavor(Extend); // shl X, 32 == 0
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addLegalFPImmediate(+0.0); // Necessary for FSEL
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addLegalFPImmediate(-0.0); //
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@ -1117,15 +1117,15 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
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Opc = DestType == MVT::f64 ? PPC::FNMADD : PPC::FNMADDS;
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BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
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} else if (!NoExcessFPPrecision &&
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ISD::SUB == N.getOperand(0).getOpcode() &&
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ISD::ADD == N.getOperand(0).getOpcode() &&
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N.getOperand(0).Val->hasOneUse() &&
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ISD::MUL == N.getOperand(0).getOperand(0).getOpcode() &&
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N.getOperand(0).getOperand(0).Val->hasOneUse()) {
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ISD::MUL == N.getOperand(0).getOperand(1).getOpcode() &&
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N.getOperand(0).getOperand(1).Val->hasOneUse()) {
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++FusedFP; // Statistic
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Tmp1 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(0));
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Tmp2 = SelectExpr(N.getOperand(0).getOperand(0).getOperand(1));
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Tmp3 = SelectExpr(N.getOperand(0).getOperand(1));
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Opc = DestType == MVT::f64 ? PPC::FNMSUB : PPC::FNMSUBS;
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Tmp1 = SelectExpr(N.getOperand(0).getOperand(1).getOperand(0));
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Tmp2 = SelectExpr(N.getOperand(0).getOperand(1).getOperand(1));
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Tmp3 = SelectExpr(N.getOperand(0).getOperand(0));
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Opc = DestType == MVT::f64 ? PPC::FNMADD : PPC::FNMADDS;
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BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
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} else if (ISD::FABS == N.getOperand(0).getOpcode()) {
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Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
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@ -1181,6 +1181,16 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
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BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
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return Result;
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}
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if (!NoExcessFPPrecision && N.getOperand(1).getOpcode() == ISD::MUL &&
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N.getOperand(1).Val->hasOneUse()) {
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++FusedFP; // Statistic
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Tmp1 = SelectExpr(N.getOperand(1).getOperand(0));
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Tmp2 = SelectExpr(N.getOperand(1).getOperand(1));
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Tmp3 = SelectExpr(N.getOperand(0));
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Opc = DestType == MVT::f64 ? PPC::FMADD : PPC::FMADDS;
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BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
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return Result;
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}
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Opc = DestType == MVT::f64 ? PPC::FADD : PPC::FADDS;
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Tmp1 = SelectExpr(N.getOperand(0));
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Tmp2 = SelectExpr(N.getOperand(1));
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@ -1198,6 +1208,16 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
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BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
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return Result;
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}
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if (!NoExcessFPPrecision && N.getOperand(1).getOpcode() == ISD::MUL &&
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N.getOperand(1).Val->hasOneUse()) {
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++FusedFP; // Statistic
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Tmp1 = SelectExpr(N.getOperand(1).getOperand(0));
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Tmp2 = SelectExpr(N.getOperand(1).getOperand(1));
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Tmp3 = SelectExpr(N.getOperand(0));
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Opc = DestType == MVT::f64 ? PPC::FNMSUB : PPC::FNMSUBS;
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BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
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return Result;
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}
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Opc = DestType == MVT::f64 ? PPC::FSUB : PPC::FSUBS;
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Tmp1 = SelectExpr(N.getOperand(0));
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Tmp2 = SelectExpr(N.getOperand(1));
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