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InstCombine: Combine (add (and %a, %b) (or %a, %b)) to (add %a, %b)
What follows bellow is a correctness proof of the transform using CVC3. $ < t.cvc A, B : BITVECTOR(32); QUERY BVPLUS(32, A & B, A | B) = BVPLUS(32, A, B); $ cvc3 < t.cvc Valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215400 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1240,7 +1240,7 @@ Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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}
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}
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// Check for (x & y) + (x ^ y)
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// (add (xor A, B) (and A, B)) --> (or A, B)
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{
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Value *A = nullptr, *B = nullptr;
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if (match(RHS, m_Xor(m_Value(A), m_Value(B))) &&
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@ -1254,6 +1254,28 @@ Instruction *InstCombiner::visitAdd(BinaryOperator &I) {
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return BinaryOperator::CreateOr(A, B);
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}
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// (add (or A, B) (and A, B)) --> (add A, B)
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{
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Value *A = nullptr, *B = nullptr;
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if (match(RHS, m_Or(m_Value(A), m_Value(B))) &&
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(match(LHS, m_And(m_Specific(A), m_Specific(B))) ||
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match(LHS, m_And(m_Specific(B), m_Specific(A))))) {
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auto *New = BinaryOperator::CreateAdd(A, B);
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New->setHasNoSignedWrap(I.hasNoSignedWrap());
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New->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
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return New;
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}
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if (match(LHS, m_Or(m_Value(A), m_Value(B))) &&
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(match(RHS, m_And(m_Specific(A), m_Specific(B))) ||
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match(RHS, m_And(m_Specific(B), m_Specific(A))))) {
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auto *New = BinaryOperator::CreateAdd(A, B);
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New->setHasNoSignedWrap(I.hasNoSignedWrap());
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New->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
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return New;
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}
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}
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// TODO(jingyue): Consider WillNotOverflowSignedAdd and
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// WillNotOverflowUnsignedAdd to reduce the number of invocations of
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// computeKnownBits.
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@ -313,3 +313,43 @@ define i16 @add_cttz_2(i16 %a) {
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ret i16 %b
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}
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!1 = metadata !{i16 0, i16 32}
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define i32 @add_or_and(i32 %x, i32 %y) {
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add i32 %or, %and
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ret i32 %add
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; CHECK-LABEL: @add_or_and(
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; CHECK-NEXT: add i32 %x, %y
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; CHECK-NEXT: ret i32
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}
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define i32 @add_nsw_or_and(i32 %x, i32 %y) {
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add nsw i32 %or, %and
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ret i32 %add
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; CHECK-LABEL: @add_nsw_or_and(
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; CHECK-NEXT: add nsw i32 %x, %y
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; CHECK-NEXT: ret i32
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}
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define i32 @add_nuw_or_and(i32 %x, i32 %y) {
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add nuw i32 %or, %and
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ret i32 %add
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; CHECK-LABEL: @add_nuw_or_and(
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; CHECK-NEXT: add nuw i32 %x, %y
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; CHECK-NEXT: ret i32
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}
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define i32 @add_nuw_nsw_or_and(i32 %x, i32 %y) {
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%or = or i32 %x, %y
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%and = and i32 %x, %y
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%add = add nsw nuw i32 %or, %and
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ret i32 %add
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; CHECK-LABEL: @add_nuw_nsw_or_and(
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; CHECK-NEXT: add nuw nsw i32 %x, %y
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; CHECK-NEXT: ret i32
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}
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